LCOV - code coverage report
Current view: top level - lib/nvme - nvme_ctrlr.c (source / functions) Hit Total Coverage
Test: ut_cov_unit.info Lines: 1586 2682 59.1 %
Date: 2024-07-15 16:17:25 Functions: 140 206 68.0 %

          Line data    Source code
       1             : /*   SPDX-License-Identifier: BSD-3-Clause
       2             :  *   Copyright (C) 2015 Intel Corporation. All rights reserved.
       3             :  *   Copyright (c) 2019-2021 Mellanox Technologies LTD. All rights reserved.
       4             :  *   Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
       5             :  */
       6             : 
       7             : #include "spdk/stdinc.h"
       8             : 
       9             : #include "nvme_internal.h"
      10             : #include "nvme_io_msg.h"
      11             : 
      12             : #include "spdk/env.h"
      13             : #include "spdk/string.h"
      14             : #include "spdk/endian.h"
      15             : 
      16             : struct nvme_active_ns_ctx;
      17             : 
      18             : static int nvme_ctrlr_construct_and_submit_aer(struct spdk_nvme_ctrlr *ctrlr,
      19             :                 struct nvme_async_event_request *aer);
      20             : static void nvme_ctrlr_identify_active_ns_async(struct nvme_active_ns_ctx *ctx);
      21             : static int nvme_ctrlr_identify_ns_async(struct spdk_nvme_ns *ns);
      22             : static int nvme_ctrlr_identify_ns_iocs_specific_async(struct spdk_nvme_ns *ns);
      23             : static int nvme_ctrlr_identify_id_desc_async(struct spdk_nvme_ns *ns);
      24             : static void nvme_ctrlr_init_cap(struct spdk_nvme_ctrlr *ctrlr);
      25             : static void nvme_ctrlr_set_state(struct spdk_nvme_ctrlr *ctrlr, enum nvme_ctrlr_state state,
      26             :                                  uint64_t timeout_in_ms);
      27             : 
      28             : static int
      29      477891 : nvme_ns_cmp(struct spdk_nvme_ns *ns1, struct spdk_nvme_ns *ns2)
      30             : {
      31      477891 :         if (ns1->id < ns2->id) {
      32      164867 :                 return -1;
      33      313024 :         } else if (ns1->id > ns2->id) {
      34      276062 :                 return 1;
      35             :         } else {
      36       36962 :                 return 0;
      37             :         }
      38             : }
      39             : 
      40      599405 : RB_GENERATE_STATIC(nvme_ns_tree, spdk_nvme_ns, node, nvme_ns_cmp);
      41             : 
      42             : #define CTRLR_STRING(ctrlr) \
      43             :         ((ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_TCP || ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_RDMA) ? \
      44             :         ctrlr->trid.subnqn : ctrlr->trid.traddr)
      45             : 
      46             : #define NVME_CTRLR_ERRLOG(ctrlr, format, ...) \
      47             :         SPDK_ERRLOG("[%s] " format, CTRLR_STRING(ctrlr), ##__VA_ARGS__);
      48             : 
      49             : #define NVME_CTRLR_WARNLOG(ctrlr, format, ...) \
      50             :         SPDK_WARNLOG("[%s] " format, CTRLR_STRING(ctrlr), ##__VA_ARGS__);
      51             : 
      52             : #define NVME_CTRLR_NOTICELOG(ctrlr, format, ...) \
      53             :         SPDK_NOTICELOG("[%s] " format, CTRLR_STRING(ctrlr), ##__VA_ARGS__);
      54             : 
      55             : #define NVME_CTRLR_INFOLOG(ctrlr, format, ...) \
      56             :         SPDK_INFOLOG(nvme, "[%s] " format, CTRLR_STRING(ctrlr), ##__VA_ARGS__);
      57             : 
      58             : #ifdef DEBUG
      59             : #define NVME_CTRLR_DEBUGLOG(ctrlr, format, ...) \
      60             :         SPDK_DEBUGLOG(nvme, "[%s] " format, CTRLR_STRING(ctrlr), ##__VA_ARGS__);
      61             : #else
      62             : #define NVME_CTRLR_DEBUGLOG(ctrlr, ...) do { } while (0)
      63             : #endif
      64             : 
      65             : #define nvme_ctrlr_get_reg_async(ctrlr, reg, sz, cb_fn, cb_arg) \
      66             :         nvme_transport_ctrlr_get_reg_ ## sz ## _async(ctrlr, \
      67             :                 offsetof(struct spdk_nvme_registers, reg), cb_fn, cb_arg)
      68             : 
      69             : #define nvme_ctrlr_set_reg_async(ctrlr, reg, sz, val, cb_fn, cb_arg) \
      70             :         nvme_transport_ctrlr_set_reg_ ## sz ## _async(ctrlr, \
      71             :                 offsetof(struct spdk_nvme_registers, reg), val, cb_fn, cb_arg)
      72             : 
      73             : #define nvme_ctrlr_get_cc_async(ctrlr, cb_fn, cb_arg) \
      74             :         nvme_ctrlr_get_reg_async(ctrlr, cc, 4, cb_fn, cb_arg)
      75             : 
      76             : #define nvme_ctrlr_get_csts_async(ctrlr, cb_fn, cb_arg) \
      77             :         nvme_ctrlr_get_reg_async(ctrlr, csts, 4, cb_fn, cb_arg)
      78             : 
      79             : #define nvme_ctrlr_get_cap_async(ctrlr, cb_fn, cb_arg) \
      80             :         nvme_ctrlr_get_reg_async(ctrlr, cap, 8, cb_fn, cb_arg)
      81             : 
      82             : #define nvme_ctrlr_get_vs_async(ctrlr, cb_fn, cb_arg) \
      83             :         nvme_ctrlr_get_reg_async(ctrlr, vs, 4, cb_fn, cb_arg)
      84             : 
      85             : #define nvme_ctrlr_set_cc_async(ctrlr, value, cb_fn, cb_arg) \
      86             :         nvme_ctrlr_set_reg_async(ctrlr, cc, 4, value, cb_fn, cb_arg)
      87             : 
      88             : static int
      89           0 : nvme_ctrlr_get_cc(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cc_register *cc)
      90             : {
      91           0 :         return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cc.raw),
      92             :                                               &cc->raw);
      93             : }
      94             : 
      95             : static int
      96           0 : nvme_ctrlr_get_csts(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_csts_register *csts)
      97             : {
      98           0 :         return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, csts.raw),
      99             :                                               &csts->raw);
     100             : }
     101             : 
     102             : int
     103           0 : nvme_ctrlr_get_cap(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cap_register *cap)
     104             : {
     105           0 :         return nvme_transport_ctrlr_get_reg_8(ctrlr, offsetof(struct spdk_nvme_registers, cap.raw),
     106             :                                               &cap->raw);
     107             : }
     108             : 
     109             : int
     110           1 : nvme_ctrlr_get_vs(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_vs_register *vs)
     111             : {
     112           1 :         return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, vs.raw),
     113             :                                               &vs->raw);
     114             : }
     115             : 
     116             : int
     117           0 : nvme_ctrlr_get_cmbsz(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cmbsz_register *cmbsz)
     118             : {
     119           0 :         return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cmbsz.raw),
     120             :                                               &cmbsz->raw);
     121             : }
     122             : 
     123             : int
     124           0 : nvme_ctrlr_get_pmrcap(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_pmrcap_register *pmrcap)
     125             : {
     126           0 :         return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, pmrcap.raw),
     127             :                                               &pmrcap->raw);
     128             : }
     129             : 
     130             : int
     131           0 : nvme_ctrlr_get_bpinfo(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_bpinfo_register *bpinfo)
     132             : {
     133           0 :         return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, bpinfo.raw),
     134             :                                               &bpinfo->raw);
     135             : }
     136             : 
     137             : int
     138           0 : nvme_ctrlr_set_bprsel(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_bprsel_register *bprsel)
     139             : {
     140           0 :         return nvme_transport_ctrlr_set_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, bprsel.raw),
     141             :                                               bprsel->raw);
     142             : }
     143             : 
     144             : int
     145           0 : nvme_ctrlr_set_bpmbl(struct spdk_nvme_ctrlr *ctrlr, uint64_t bpmbl_value)
     146             : {
     147           0 :         return nvme_transport_ctrlr_set_reg_8(ctrlr, offsetof(struct spdk_nvme_registers, bpmbl),
     148             :                                               bpmbl_value);
     149             : }
     150             : 
     151             : static int
     152           0 : nvme_ctrlr_set_nssr(struct spdk_nvme_ctrlr *ctrlr, uint32_t nssr_value)
     153             : {
     154           0 :         return nvme_transport_ctrlr_set_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, nssr),
     155             :                                               nssr_value);
     156             : }
     157             : 
     158             : bool
     159          33 : nvme_ctrlr_multi_iocs_enabled(struct spdk_nvme_ctrlr *ctrlr)
     160             : {
     161          35 :         return ctrlr->cap.bits.css & SPDK_NVME_CAP_CSS_IOCS &&
     162           2 :                ctrlr->opts.command_set == SPDK_NVME_CC_CSS_IOCS;
     163             : }
     164             : 
     165             : /* When the field in spdk_nvme_ctrlr_opts are changed and you change this function, please
     166             :  * also update the nvme_ctrl_opts_init function in nvme_ctrlr.c
     167             :  */
     168             : void
     169           2 : spdk_nvme_ctrlr_get_default_ctrlr_opts(struct spdk_nvme_ctrlr_opts *opts, size_t opts_size)
     170             : {
     171           2 :         assert(opts);
     172             : 
     173           2 :         opts->opts_size = opts_size;
     174             : 
     175             : #define FIELD_OK(field) \
     176             :         offsetof(struct spdk_nvme_ctrlr_opts, field) + sizeof(opts->field) <= opts_size
     177             : 
     178             : #define SET_FIELD(field, value) \
     179             :         if (offsetof(struct spdk_nvme_ctrlr_opts, field) + sizeof(opts->field) <= opts_size) { \
     180             :                 opts->field = value; \
     181             :         } \
     182             : 
     183           2 :         SET_FIELD(num_io_queues, DEFAULT_MAX_IO_QUEUES);
     184           2 :         SET_FIELD(use_cmb_sqs, false);
     185           2 :         SET_FIELD(no_shn_notification, false);
     186           2 :         SET_FIELD(arb_mechanism, SPDK_NVME_CC_AMS_RR);
     187           2 :         SET_FIELD(arbitration_burst, 0);
     188           2 :         SET_FIELD(low_priority_weight, 0);
     189           2 :         SET_FIELD(medium_priority_weight, 0);
     190           2 :         SET_FIELD(high_priority_weight, 0);
     191           2 :         SET_FIELD(keep_alive_timeout_ms, MIN_KEEP_ALIVE_TIMEOUT_IN_MS);
     192           2 :         SET_FIELD(transport_retry_count, SPDK_NVME_DEFAULT_RETRY_COUNT);
     193           2 :         SET_FIELD(io_queue_size, DEFAULT_IO_QUEUE_SIZE);
     194             : 
     195           2 :         if (nvme_driver_init() == 0) {
     196           2 :                 if (FIELD_OK(hostnqn)) {
     197           1 :                         nvme_get_default_hostnqn(opts->hostnqn, sizeof(opts->hostnqn));
     198             :                 }
     199             : 
     200           2 :                 if (FIELD_OK(extended_host_id)) {
     201           1 :                         memcpy(opts->extended_host_id, &g_spdk_nvme_driver->default_extended_host_id,
     202             :                                sizeof(opts->extended_host_id));
     203             :                 }
     204             : 
     205             :         }
     206             : 
     207           2 :         SET_FIELD(io_queue_requests, DEFAULT_IO_QUEUE_REQUESTS);
     208             : 
     209           2 :         if (FIELD_OK(src_addr)) {
     210           1 :                 memset(opts->src_addr, 0, sizeof(opts->src_addr));
     211             :         }
     212             : 
     213           2 :         if (FIELD_OK(src_svcid)) {
     214           1 :                 memset(opts->src_svcid, 0, sizeof(opts->src_svcid));
     215             :         }
     216             : 
     217           2 :         if (FIELD_OK(host_id)) {
     218           1 :                 memset(opts->host_id, 0, sizeof(opts->host_id));
     219             :         }
     220             : 
     221           2 :         SET_FIELD(command_set, CHAR_BIT);
     222           2 :         SET_FIELD(admin_timeout_ms, NVME_MAX_ADMIN_TIMEOUT_IN_SECS * 1000);
     223           2 :         SET_FIELD(header_digest, false);
     224           2 :         SET_FIELD(data_digest, false);
     225           2 :         SET_FIELD(disable_error_logging, false);
     226           2 :         SET_FIELD(transport_ack_timeout, SPDK_NVME_DEFAULT_TRANSPORT_ACK_TIMEOUT);
     227           2 :         SET_FIELD(admin_queue_size, DEFAULT_ADMIN_QUEUE_SIZE);
     228           2 :         SET_FIELD(fabrics_connect_timeout_us, NVME_FABRIC_CONNECT_COMMAND_TIMEOUT);
     229           2 :         SET_FIELD(disable_read_ana_log_page, false);
     230           2 :         SET_FIELD(disable_read_changed_ns_list_log_page, false);
     231           2 :         SET_FIELD(tls_psk, NULL);
     232           2 :         SET_FIELD(dhchap_key, NULL);
     233           2 :         SET_FIELD(dhchap_ctrlr_key, NULL);
     234           2 :         SET_FIELD(dhchap_digests,
     235             :                   SPDK_BIT(SPDK_NVMF_DHCHAP_HASH_SHA256) |
     236             :                   SPDK_BIT(SPDK_NVMF_DHCHAP_HASH_SHA384) |
     237             :                   SPDK_BIT(SPDK_NVMF_DHCHAP_HASH_SHA512));
     238           2 :         SET_FIELD(dhchap_dhgroups,
     239             :                   SPDK_BIT(SPDK_NVMF_DHCHAP_DHGROUP_NULL) |
     240             :                   SPDK_BIT(SPDK_NVMF_DHCHAP_DHGROUP_2048) |
     241             :                   SPDK_BIT(SPDK_NVMF_DHCHAP_DHGROUP_3072) |
     242             :                   SPDK_BIT(SPDK_NVMF_DHCHAP_DHGROUP_4096) |
     243             :                   SPDK_BIT(SPDK_NVMF_DHCHAP_DHGROUP_6144) |
     244             :                   SPDK_BIT(SPDK_NVMF_DHCHAP_DHGROUP_8192));
     245             : 
     246           2 :         if (FIELD_OK(psk)) {
     247           1 :                 memset(opts->psk, 0, sizeof(opts->psk));
     248             :         }
     249             : 
     250             : #undef FIELD_OK
     251             : #undef SET_FIELD
     252           2 : }
     253             : 
     254             : const struct spdk_nvme_ctrlr_opts *
     255           0 : spdk_nvme_ctrlr_get_opts(struct spdk_nvme_ctrlr *ctrlr)
     256             : {
     257           0 :         return &ctrlr->opts;
     258             : }
     259             : 
     260             : /**
     261             :  * This function will be called when the process allocates the IO qpair.
     262             :  * Note: the ctrlr_lock must be held when calling this function.
     263             :  */
     264             : static void
     265          15 : nvme_ctrlr_proc_add_io_qpair(struct spdk_nvme_qpair *qpair)
     266             : {
     267             :         struct spdk_nvme_ctrlr_process  *active_proc;
     268          15 :         struct spdk_nvme_ctrlr          *ctrlr = qpair->ctrlr;
     269             : 
     270          15 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
     271          15 :         if (active_proc) {
     272           0 :                 TAILQ_INSERT_TAIL(&active_proc->allocated_io_qpairs, qpair, per_process_tailq);
     273           0 :                 qpair->active_proc = active_proc;
     274             :         }
     275          15 : }
     276             : 
     277             : /**
     278             :  * This function will be called when the process frees the IO qpair.
     279             :  * Note: the ctrlr_lock must be held when calling this function.
     280             :  */
     281             : static void
     282          15 : nvme_ctrlr_proc_remove_io_qpair(struct spdk_nvme_qpair *qpair)
     283             : {
     284             :         struct spdk_nvme_ctrlr_process  *active_proc;
     285          15 :         struct spdk_nvme_ctrlr          *ctrlr = qpair->ctrlr;
     286             :         struct spdk_nvme_qpair          *active_qpair, *tmp_qpair;
     287             : 
     288          15 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
     289          15 :         if (!active_proc) {
     290          15 :                 return;
     291             :         }
     292             : 
     293           0 :         TAILQ_FOREACH_SAFE(active_qpair, &active_proc->allocated_io_qpairs,
     294             :                            per_process_tailq, tmp_qpair) {
     295           0 :                 if (active_qpair == qpair) {
     296           0 :                         TAILQ_REMOVE(&active_proc->allocated_io_qpairs,
     297             :                                      active_qpair, per_process_tailq);
     298             : 
     299           0 :                         break;
     300             :                 }
     301             :         }
     302             : }
     303             : 
     304             : void
     305          27 : spdk_nvme_ctrlr_get_default_io_qpair_opts(struct spdk_nvme_ctrlr *ctrlr,
     306             :                 struct spdk_nvme_io_qpair_opts *opts,
     307             :                 size_t opts_size)
     308             : {
     309          27 :         assert(ctrlr);
     310             : 
     311          27 :         assert(opts);
     312             : 
     313          27 :         memset(opts, 0, opts_size);
     314             : 
     315             : #define FIELD_OK(field) \
     316             :         offsetof(struct spdk_nvme_io_qpair_opts, field) + sizeof(opts->field) <= opts_size
     317             : 
     318          27 :         if (FIELD_OK(qprio)) {
     319          27 :                 opts->qprio = SPDK_NVME_QPRIO_URGENT;
     320             :         }
     321             : 
     322          27 :         if (FIELD_OK(io_queue_size)) {
     323          27 :                 opts->io_queue_size = ctrlr->opts.io_queue_size;
     324             :         }
     325             : 
     326          27 :         if (FIELD_OK(io_queue_requests)) {
     327          26 :                 opts->io_queue_requests = ctrlr->opts.io_queue_requests;
     328             :         }
     329             : 
     330          27 :         if (FIELD_OK(delay_cmd_submit)) {
     331          26 :                 opts->delay_cmd_submit = false;
     332             :         }
     333             : 
     334          27 :         if (FIELD_OK(sq.vaddr)) {
     335          26 :                 opts->sq.vaddr = NULL;
     336             :         }
     337             : 
     338          27 :         if (FIELD_OK(sq.paddr)) {
     339          26 :                 opts->sq.paddr = 0;
     340             :         }
     341             : 
     342          27 :         if (FIELD_OK(sq.buffer_size)) {
     343          26 :                 opts->sq.buffer_size = 0;
     344             :         }
     345             : 
     346          27 :         if (FIELD_OK(cq.vaddr)) {
     347          26 :                 opts->cq.vaddr = NULL;
     348             :         }
     349             : 
     350          27 :         if (FIELD_OK(cq.paddr)) {
     351          26 :                 opts->cq.paddr = 0;
     352             :         }
     353             : 
     354          27 :         if (FIELD_OK(cq.buffer_size)) {
     355          26 :                 opts->cq.buffer_size = 0;
     356             :         }
     357             : 
     358          27 :         if (FIELD_OK(create_only)) {
     359          26 :                 opts->create_only = false;
     360             :         }
     361             : 
     362          27 :         if (FIELD_OK(async_mode)) {
     363          26 :                 opts->async_mode = false;
     364             :         }
     365             : 
     366             : #undef FIELD_OK
     367          27 : }
     368             : 
     369             : static struct spdk_nvme_qpair *
     370          22 : nvme_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr,
     371             :                            const struct spdk_nvme_io_qpair_opts *opts)
     372             : {
     373             :         int32_t                                 qid;
     374             :         struct spdk_nvme_qpair                  *qpair;
     375             :         union spdk_nvme_cc_register             cc;
     376             : 
     377          22 :         if (!ctrlr) {
     378           0 :                 return NULL;
     379             :         }
     380             : 
     381          22 :         nvme_ctrlr_lock(ctrlr);
     382          22 :         cc.raw = ctrlr->process_init_cc.raw;
     383             : 
     384          22 :         if (opts->qprio & ~SPDK_NVME_CREATE_IO_SQ_QPRIO_MASK) {
     385           2 :                 nvme_ctrlr_unlock(ctrlr);
     386           2 :                 return NULL;
     387             :         }
     388             : 
     389             :         /*
     390             :          * Only value SPDK_NVME_QPRIO_URGENT(0) is valid for the
     391             :          * default round robin arbitration method.
     392             :          */
     393          20 :         if ((cc.bits.ams == SPDK_NVME_CC_AMS_RR) && (opts->qprio != SPDK_NVME_QPRIO_URGENT)) {
     394           3 :                 NVME_CTRLR_ERRLOG(ctrlr, "invalid queue priority for default round robin arbitration method\n");
     395           3 :                 nvme_ctrlr_unlock(ctrlr);
     396           3 :                 return NULL;
     397             :         }
     398             : 
     399          17 :         qid = spdk_nvme_ctrlr_alloc_qid(ctrlr);
     400          17 :         if (qid < 0) {
     401           2 :                 nvme_ctrlr_unlock(ctrlr);
     402           2 :                 return NULL;
     403             :         }
     404             : 
     405          15 :         qpair = nvme_transport_ctrlr_create_io_qpair(ctrlr, qid, opts);
     406          15 :         if (qpair == NULL) {
     407           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "nvme_transport_ctrlr_create_io_qpair() failed\n");
     408           0 :                 spdk_nvme_ctrlr_free_qid(ctrlr, qid);
     409           0 :                 nvme_ctrlr_unlock(ctrlr);
     410           0 :                 return NULL;
     411             :         }
     412             : 
     413          15 :         TAILQ_INSERT_TAIL(&ctrlr->active_io_qpairs, qpair, tailq);
     414             : 
     415          15 :         nvme_ctrlr_proc_add_io_qpair(qpair);
     416             : 
     417          15 :         nvme_ctrlr_unlock(ctrlr);
     418             : 
     419          15 :         return qpair;
     420             : }
     421             : 
     422             : int
     423          15 : spdk_nvme_ctrlr_connect_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair)
     424             : {
     425             :         int rc;
     426             : 
     427          15 :         if (nvme_qpair_get_state(qpair) != NVME_QPAIR_DISCONNECTED) {
     428           0 :                 return -EISCONN;
     429             :         }
     430             : 
     431          15 :         nvme_ctrlr_lock(ctrlr);
     432          15 :         rc = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair);
     433          15 :         nvme_ctrlr_unlock(ctrlr);
     434             : 
     435          15 :         if (ctrlr->quirks & NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC) {
     436           0 :                 spdk_delay_us(100);
     437             :         }
     438             : 
     439          15 :         return rc;
     440             : }
     441             : 
     442             : void
     443           0 : spdk_nvme_ctrlr_disconnect_io_qpair(struct spdk_nvme_qpair *qpair)
     444             : {
     445           0 :         struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
     446             : 
     447           0 :         nvme_ctrlr_lock(ctrlr);
     448           0 :         nvme_transport_ctrlr_disconnect_qpair(ctrlr, qpair);
     449           0 :         nvme_ctrlr_unlock(ctrlr);
     450           0 : }
     451             : 
     452             : struct spdk_nvme_qpair *
     453          23 : spdk_nvme_ctrlr_alloc_io_qpair(struct spdk_nvme_ctrlr *ctrlr,
     454             :                                const struct spdk_nvme_io_qpair_opts *user_opts,
     455             :                                size_t opts_size)
     456             : {
     457             : 
     458          23 :         struct spdk_nvme_qpair          *qpair = NULL;
     459          23 :         struct spdk_nvme_io_qpair_opts  opts;
     460             :         int                             rc;
     461             : 
     462          23 :         nvme_ctrlr_lock(ctrlr);
     463             : 
     464          23 :         if (spdk_unlikely(ctrlr->state != NVME_CTRLR_STATE_READY)) {
     465             :                 /* When controller is resetting or initializing, free_io_qids is deleted or not created yet.
     466             :                  * We can't create IO qpair in that case */
     467           1 :                 goto unlock;
     468             :         }
     469             : 
     470             :         /*
     471             :          * Get the default options, then overwrite them with the user-provided options
     472             :          * up to opts_size.
     473             :          *
     474             :          * This allows for extensions of the opts structure without breaking
     475             :          * ABI compatibility.
     476             :          */
     477          22 :         spdk_nvme_ctrlr_get_default_io_qpair_opts(ctrlr, &opts, sizeof(opts));
     478          22 :         if (user_opts) {
     479          18 :                 memcpy(&opts, user_opts, spdk_min(sizeof(opts), opts_size));
     480             : 
     481             :                 /* If user passes buffers, make sure they're big enough for the requested queue size */
     482          18 :                 if (opts.sq.vaddr) {
     483           0 :                         if (opts.sq.buffer_size < (opts.io_queue_size * sizeof(struct spdk_nvme_cmd))) {
     484           0 :                                 NVME_CTRLR_ERRLOG(ctrlr, "sq buffer size %" PRIx64 " is too small for sq size %zx\n",
     485             :                                                   opts.sq.buffer_size, (opts.io_queue_size * sizeof(struct spdk_nvme_cmd)));
     486           0 :                                 goto unlock;
     487             :                         }
     488             :                 }
     489          18 :                 if (opts.cq.vaddr) {
     490           0 :                         if (opts.cq.buffer_size < (opts.io_queue_size * sizeof(struct spdk_nvme_cpl))) {
     491           0 :                                 NVME_CTRLR_ERRLOG(ctrlr, "cq buffer size %" PRIx64 " is too small for cq size %zx\n",
     492             :                                                   opts.cq.buffer_size, (opts.io_queue_size * sizeof(struct spdk_nvme_cpl)));
     493           0 :                                 goto unlock;
     494             :                         }
     495             :                 }
     496             :         }
     497             : 
     498          22 :         qpair = nvme_ctrlr_create_io_qpair(ctrlr, &opts);
     499             : 
     500          22 :         if (qpair == NULL || opts.create_only == true) {
     501           7 :                 goto unlock;
     502             :         }
     503             : 
     504          15 :         rc = spdk_nvme_ctrlr_connect_io_qpair(ctrlr, qpair);
     505          15 :         if (rc != 0) {
     506           1 :                 NVME_CTRLR_ERRLOG(ctrlr, "nvme_transport_ctrlr_connect_io_qpair() failed\n");
     507           1 :                 nvme_ctrlr_proc_remove_io_qpair(qpair);
     508           1 :                 TAILQ_REMOVE(&ctrlr->active_io_qpairs, qpair, tailq);
     509           1 :                 spdk_bit_array_set(ctrlr->free_io_qids, qpair->id);
     510           1 :                 nvme_transport_ctrlr_delete_io_qpair(ctrlr, qpair);
     511           1 :                 qpair = NULL;
     512           1 :                 goto unlock;
     513             :         }
     514             : 
     515          23 : unlock:
     516          23 :         nvme_ctrlr_unlock(ctrlr);
     517             : 
     518          23 :         return qpair;
     519             : }
     520             : 
     521             : int
     522           8 : spdk_nvme_ctrlr_reconnect_io_qpair(struct spdk_nvme_qpair *qpair)
     523             : {
     524             :         struct spdk_nvme_ctrlr *ctrlr;
     525             :         enum nvme_qpair_state qpair_state;
     526             :         int rc;
     527             : 
     528           8 :         assert(qpair != NULL);
     529           8 :         assert(nvme_qpair_is_admin_queue(qpair) == false);
     530           8 :         assert(qpair->ctrlr != NULL);
     531             : 
     532           8 :         ctrlr = qpair->ctrlr;
     533           8 :         nvme_ctrlr_lock(ctrlr);
     534           8 :         qpair_state = nvme_qpair_get_state(qpair);
     535             : 
     536           8 :         if (ctrlr->is_removed) {
     537           2 :                 rc = -ENODEV;
     538           2 :                 goto out;
     539             :         }
     540             : 
     541           6 :         if (ctrlr->is_resetting || qpair_state == NVME_QPAIR_DISCONNECTING) {
     542           2 :                 rc = -EAGAIN;
     543           2 :                 goto out;
     544             :         }
     545             : 
     546           4 :         if (ctrlr->is_failed || qpair_state == NVME_QPAIR_DESTROYING) {
     547           2 :                 rc = -ENXIO;
     548           2 :                 goto out;
     549             :         }
     550             : 
     551           2 :         if (qpair_state != NVME_QPAIR_DISCONNECTED) {
     552           1 :                 rc = 0;
     553           1 :                 goto out;
     554             :         }
     555             : 
     556           1 :         rc = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair);
     557           1 :         if (rc) {
     558           0 :                 rc = -EAGAIN;
     559           0 :                 goto out;
     560             :         }
     561             : 
     562           1 : out:
     563           8 :         nvme_ctrlr_unlock(ctrlr);
     564           8 :         return rc;
     565             : }
     566             : 
     567             : spdk_nvme_qp_failure_reason
     568           0 : spdk_nvme_ctrlr_get_admin_qp_failure_reason(struct spdk_nvme_ctrlr *ctrlr)
     569             : {
     570           0 :         return ctrlr->adminq->transport_failure_reason;
     571             : }
     572             : 
     573             : /*
     574             :  * This internal function will attempt to take the controller
     575             :  * lock before calling disconnect on a controller qpair.
     576             :  * Functions already holding the controller lock should
     577             :  * call nvme_transport_ctrlr_disconnect_qpair directly.
     578             :  */
     579             : void
     580           0 : nvme_ctrlr_disconnect_qpair(struct spdk_nvme_qpair *qpair)
     581             : {
     582           0 :         struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
     583             : 
     584           0 :         assert(ctrlr != NULL);
     585           0 :         nvme_ctrlr_lock(ctrlr);
     586           0 :         nvme_transport_ctrlr_disconnect_qpair(ctrlr, qpair);
     587           0 :         nvme_ctrlr_unlock(ctrlr);
     588           0 : }
     589             : 
     590             : int
     591          14 : spdk_nvme_ctrlr_free_io_qpair(struct spdk_nvme_qpair *qpair)
     592             : {
     593             :         struct spdk_nvme_ctrlr *ctrlr;
     594             : 
     595          14 :         if (qpair == NULL) {
     596           0 :                 return 0;
     597             :         }
     598             : 
     599          14 :         ctrlr = qpair->ctrlr;
     600             : 
     601          14 :         if (qpair->in_completion_context) {
     602             :                 /*
     603             :                  * There are many cases where it is convenient to delete an io qpair in the context
     604             :                  *  of that qpair's completion routine.  To handle this properly, set a flag here
     605             :                  *  so that the completion routine will perform an actual delete after the context
     606             :                  *  unwinds.
     607             :                  */
     608           0 :                 qpair->delete_after_completion_context = 1;
     609           0 :                 return 0;
     610             :         }
     611             : 
     612          14 :         qpair->destroy_in_progress = 1;
     613             : 
     614          14 :         nvme_transport_ctrlr_disconnect_qpair(ctrlr, qpair);
     615             : 
     616          14 :         if (qpair->poll_group && (qpair->active_proc == nvme_ctrlr_get_current_process(ctrlr))) {
     617           0 :                 spdk_nvme_poll_group_remove(qpair->poll_group->group, qpair);
     618             :         }
     619             : 
     620             :         /* Do not retry. */
     621          14 :         nvme_qpair_set_state(qpair, NVME_QPAIR_DESTROYING);
     622             : 
     623             :         /* In the multi-process case, a process may call this function on a foreign
     624             :          * I/O qpair (i.e. one that this process did not create) when that qpairs process
     625             :          * exits unexpectedly.  In that case, we must not try to abort any reqs associated
     626             :          * with that qpair, since the callbacks will also be foreign to this process.
     627             :          */
     628          14 :         if (qpair->active_proc == nvme_ctrlr_get_current_process(ctrlr)) {
     629          14 :                 nvme_qpair_abort_all_queued_reqs(qpair);
     630             :         }
     631             : 
     632          14 :         nvme_ctrlr_lock(ctrlr);
     633             : 
     634          14 :         nvme_ctrlr_proc_remove_io_qpair(qpair);
     635             : 
     636          14 :         TAILQ_REMOVE(&ctrlr->active_io_qpairs, qpair, tailq);
     637          14 :         spdk_nvme_ctrlr_free_qid(ctrlr, qpair->id);
     638             : 
     639          14 :         nvme_transport_ctrlr_delete_io_qpair(ctrlr, qpair);
     640          14 :         nvme_ctrlr_unlock(ctrlr);
     641          14 :         return 0;
     642             : }
     643             : 
     644             : static void
     645           3 : nvme_ctrlr_construct_intel_support_log_page_list(struct spdk_nvme_ctrlr *ctrlr,
     646             :                 struct spdk_nvme_intel_log_page_directory *log_page_directory)
     647             : {
     648           3 :         if (log_page_directory == NULL) {
     649           0 :                 return;
     650             :         }
     651             : 
     652           3 :         assert(ctrlr->cdata.vid == SPDK_PCI_VID_INTEL);
     653             : 
     654           3 :         ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_PAGE_DIRECTORY] = true;
     655             : 
     656           3 :         if (log_page_directory->read_latency_log_len ||
     657           2 :             (ctrlr->quirks & NVME_INTEL_QUIRK_READ_LATENCY)) {
     658           2 :                 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_READ_CMD_LATENCY] = true;
     659             :         }
     660           3 :         if (log_page_directory->write_latency_log_len ||
     661           2 :             (ctrlr->quirks & NVME_INTEL_QUIRK_WRITE_LATENCY)) {
     662           2 :                 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_WRITE_CMD_LATENCY] = true;
     663             :         }
     664           3 :         if (log_page_directory->temperature_statistics_log_len) {
     665           2 :                 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_TEMPERATURE] = true;
     666             :         }
     667           3 :         if (log_page_directory->smart_log_len) {
     668           1 :                 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_SMART] = true;
     669             :         }
     670           3 :         if (log_page_directory->marketing_description_log_len) {
     671           1 :                 ctrlr->log_page_supported[SPDK_NVME_INTEL_MARKETING_DESCRIPTION] = true;
     672             :         }
     673             : }
     674             : 
     675             : struct intel_log_pages_ctx {
     676             :         struct spdk_nvme_intel_log_page_directory log_page_directory;
     677             :         struct spdk_nvme_ctrlr *ctrlr;
     678             : };
     679             : 
     680             : static void
     681           1 : nvme_ctrlr_set_intel_support_log_pages_done(void *arg, const struct spdk_nvme_cpl *cpl)
     682             : {
     683           1 :         struct intel_log_pages_ctx *ctx = arg;
     684           1 :         struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr;
     685             : 
     686           1 :         if (!spdk_nvme_cpl_is_error(cpl)) {
     687           1 :                 nvme_ctrlr_construct_intel_support_log_page_list(ctrlr, &ctx->log_page_directory);
     688             :         }
     689             : 
     690           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES,
     691           1 :                              ctrlr->opts.admin_timeout_ms);
     692           1 :         free(ctx);
     693           1 : }
     694             : 
     695             : static int
     696           1 : nvme_ctrlr_set_intel_support_log_pages(struct spdk_nvme_ctrlr *ctrlr)
     697             : {
     698           1 :         int rc = 0;
     699             :         struct intel_log_pages_ctx *ctx;
     700             : 
     701           1 :         ctx = calloc(1, sizeof(*ctx));
     702           1 :         if (!ctx) {
     703           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES,
     704           0 :                                      ctrlr->opts.admin_timeout_ms);
     705           0 :                 return 0;
     706             :         }
     707             : 
     708           1 :         ctx->ctrlr = ctrlr;
     709             : 
     710           1 :         rc = spdk_nvme_ctrlr_cmd_get_log_page(ctrlr, SPDK_NVME_INTEL_LOG_PAGE_DIRECTORY,
     711           1 :                                               SPDK_NVME_GLOBAL_NS_TAG, &ctx->log_page_directory,
     712             :                                               sizeof(struct spdk_nvme_intel_log_page_directory),
     713             :                                               0, nvme_ctrlr_set_intel_support_log_pages_done, ctx);
     714           1 :         if (rc != 0) {
     715           0 :                 free(ctx);
     716           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES,
     717           0 :                                      ctrlr->opts.admin_timeout_ms);
     718           0 :                 return 0;
     719             :         }
     720             : 
     721           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_SUPPORTED_INTEL_LOG_PAGES,
     722           1 :                              ctrlr->opts.admin_timeout_ms);
     723             : 
     724           1 :         return 0;
     725             : }
     726             : 
     727             : static int
     728           4 : nvme_ctrlr_alloc_ana_log_page(struct spdk_nvme_ctrlr *ctrlr)
     729             : {
     730             :         uint32_t ana_log_page_size;
     731             : 
     732           4 :         ana_log_page_size = sizeof(struct spdk_nvme_ana_page) + ctrlr->cdata.nanagrpid *
     733           4 :                             sizeof(struct spdk_nvme_ana_group_descriptor) + ctrlr->active_ns_count *
     734             :                             sizeof(uint32_t);
     735             : 
     736             :         /* Number of active namespaces may have changed.
     737             :          * Check if ANA log page fits into existing buffer.
     738             :          */
     739           4 :         if (ana_log_page_size > ctrlr->ana_log_page_size) {
     740             :                 void *new_buffer;
     741             : 
     742           4 :                 if (ctrlr->ana_log_page) {
     743           1 :                         new_buffer = realloc(ctrlr->ana_log_page, ana_log_page_size);
     744             :                 } else {
     745           3 :                         new_buffer = calloc(1, ana_log_page_size);
     746             :                 }
     747             : 
     748           4 :                 if (!new_buffer) {
     749           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "could not allocate ANA log page buffer, size %u\n",
     750             :                                           ana_log_page_size);
     751           0 :                         return -ENXIO;
     752             :                 }
     753             : 
     754           4 :                 ctrlr->ana_log_page = new_buffer;
     755           4 :                 if (ctrlr->copied_ana_desc) {
     756           1 :                         new_buffer = realloc(ctrlr->copied_ana_desc, ana_log_page_size);
     757             :                 } else {
     758           3 :                         new_buffer = calloc(1, ana_log_page_size);
     759             :                 }
     760             : 
     761           4 :                 if (!new_buffer) {
     762           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "could not allocate a buffer to parse ANA descriptor, size %u\n",
     763             :                                           ana_log_page_size);
     764           0 :                         return -ENOMEM;
     765             :                 }
     766             : 
     767           4 :                 ctrlr->copied_ana_desc = new_buffer;
     768           4 :                 ctrlr->ana_log_page_size = ana_log_page_size;
     769             :         }
     770             : 
     771           4 :         return 0;
     772             : }
     773             : 
     774             : static int
     775           4 : nvme_ctrlr_update_ana_log_page(struct spdk_nvme_ctrlr *ctrlr)
     776             : {
     777             :         struct nvme_completion_poll_status *status;
     778             :         int rc;
     779             : 
     780           4 :         rc = nvme_ctrlr_alloc_ana_log_page(ctrlr);
     781           4 :         if (rc != 0) {
     782           0 :                 return rc;
     783             :         }
     784             : 
     785           4 :         status = calloc(1, sizeof(*status));
     786           4 :         if (status == NULL) {
     787           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
     788           0 :                 return -ENOMEM;
     789             :         }
     790             : 
     791           4 :         rc = spdk_nvme_ctrlr_cmd_get_log_page(ctrlr, SPDK_NVME_LOG_ASYMMETRIC_NAMESPACE_ACCESS,
     792           4 :                                               SPDK_NVME_GLOBAL_NS_TAG, ctrlr->ana_log_page,
     793             :                                               ctrlr->ana_log_page_size, 0,
     794             :                                               nvme_completion_poll_cb, status);
     795           4 :         if (rc != 0) {
     796           0 :                 free(status);
     797           0 :                 return rc;
     798             :         }
     799             : 
     800           4 :         if (nvme_wait_for_completion_robust_lock_timeout(ctrlr->adminq, status, &ctrlr->ctrlr_lock,
     801           4 :                         ctrlr->opts.admin_timeout_ms * 1000)) {
     802           0 :                 if (!status->timed_out) {
     803           0 :                         free(status);
     804             :                 }
     805           0 :                 return -EIO;
     806             :         }
     807             : 
     808           4 :         free(status);
     809           4 :         return 0;
     810             : }
     811             : 
     812             : static int
     813           5 : nvme_ctrlr_update_ns_ana_states(const struct spdk_nvme_ana_group_descriptor *desc,
     814             :                                 void *cb_arg)
     815             : {
     816           5 :         struct spdk_nvme_ctrlr *ctrlr = cb_arg;
     817             :         struct spdk_nvme_ns *ns;
     818             :         uint32_t i, nsid;
     819             : 
     820          14 :         for (i = 0; i < desc->num_of_nsid; i++) {
     821           9 :                 nsid = desc->nsid[i];
     822           9 :                 if (nsid == 0 || nsid > ctrlr->cdata.nn) {
     823           0 :                         continue;
     824             :                 }
     825             : 
     826           9 :                 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
     827           9 :                 assert(ns != NULL);
     828             : 
     829           9 :                 ns->ana_group_id = desc->ana_group_id;
     830           9 :                 ns->ana_state = desc->ana_state;
     831             :         }
     832             : 
     833           5 :         return 0;
     834             : }
     835             : 
     836             : int
     837           4 : nvme_ctrlr_parse_ana_log_page(struct spdk_nvme_ctrlr *ctrlr,
     838             :                               spdk_nvme_parse_ana_log_page_cb cb_fn, void *cb_arg)
     839             : {
     840             :         struct spdk_nvme_ana_group_descriptor *copied_desc;
     841             :         uint8_t *orig_desc;
     842             :         uint32_t i, desc_size, copy_len;
     843           4 :         int rc = 0;
     844             : 
     845           4 :         if (ctrlr->ana_log_page == NULL) {
     846           0 :                 return -EINVAL;
     847             :         }
     848             : 
     849           4 :         copied_desc = ctrlr->copied_ana_desc;
     850             : 
     851           4 :         orig_desc = (uint8_t *)ctrlr->ana_log_page + sizeof(struct spdk_nvme_ana_page);
     852           4 :         copy_len = ctrlr->ana_log_page_size - sizeof(struct spdk_nvme_ana_page);
     853             : 
     854           9 :         for (i = 0; i < ctrlr->ana_log_page->num_ana_group_desc; i++) {
     855           5 :                 memcpy(copied_desc, orig_desc, copy_len);
     856             : 
     857           5 :                 rc = cb_fn(copied_desc, cb_arg);
     858           5 :                 if (rc != 0) {
     859           0 :                         break;
     860             :                 }
     861             : 
     862           5 :                 desc_size = sizeof(struct spdk_nvme_ana_group_descriptor) +
     863           5 :                             copied_desc->num_of_nsid * sizeof(uint32_t);
     864           5 :                 orig_desc += desc_size;
     865           5 :                 copy_len -= desc_size;
     866             :         }
     867             : 
     868           4 :         return rc;
     869             : }
     870             : 
     871             : static int
     872          16 : nvme_ctrlr_set_supported_log_pages(struct spdk_nvme_ctrlr *ctrlr)
     873             : {
     874          16 :         int     rc = 0;
     875             : 
     876          16 :         memset(ctrlr->log_page_supported, 0, sizeof(ctrlr->log_page_supported));
     877             :         /* Mandatory pages */
     878          16 :         ctrlr->log_page_supported[SPDK_NVME_LOG_ERROR] = true;
     879          16 :         ctrlr->log_page_supported[SPDK_NVME_LOG_HEALTH_INFORMATION] = true;
     880          16 :         ctrlr->log_page_supported[SPDK_NVME_LOG_FIRMWARE_SLOT] = true;
     881          16 :         if (ctrlr->cdata.lpa.celp) {
     882           1 :                 ctrlr->log_page_supported[SPDK_NVME_LOG_COMMAND_EFFECTS_LOG] = true;
     883             :         }
     884             : 
     885          16 :         if (ctrlr->cdata.cmic.ana_reporting) {
     886           2 :                 ctrlr->log_page_supported[SPDK_NVME_LOG_ASYMMETRIC_NAMESPACE_ACCESS] = true;
     887           2 :                 if (!ctrlr->opts.disable_read_ana_log_page) {
     888           2 :                         rc = nvme_ctrlr_update_ana_log_page(ctrlr);
     889           2 :                         if (rc == 0) {
     890           2 :                                 nvme_ctrlr_parse_ana_log_page(ctrlr, nvme_ctrlr_update_ns_ana_states,
     891             :                                                               ctrlr);
     892             :                         }
     893             :                 }
     894             :         }
     895             : 
     896          16 :         if (ctrlr->cdata.ctratt.bits.fdps) {
     897           0 :                 ctrlr->log_page_supported[SPDK_NVME_LOG_FDP_CONFIGURATIONS] = true;
     898           0 :                 ctrlr->log_page_supported[SPDK_NVME_LOG_RECLAIM_UNIT_HANDLE_USAGE] = true;
     899           0 :                 ctrlr->log_page_supported[SPDK_NVME_LOG_FDP_STATISTICS] = true;
     900           0 :                 ctrlr->log_page_supported[SPDK_NVME_LOG_FDP_EVENTS] = true;
     901             :         }
     902             : 
     903          16 :         if (ctrlr->cdata.vid == SPDK_PCI_VID_INTEL &&
     904           1 :             ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE &&
     905           1 :             !(ctrlr->quirks & NVME_INTEL_QUIRK_NO_LOG_PAGES)) {
     906           1 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_INTEL_LOG_PAGES,
     907           1 :                                      ctrlr->opts.admin_timeout_ms);
     908             : 
     909             :         } else {
     910          15 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES,
     911          15 :                                      ctrlr->opts.admin_timeout_ms);
     912             : 
     913             :         }
     914             : 
     915          16 :         return rc;
     916             : }
     917             : 
     918             : static void
     919           1 : nvme_ctrlr_set_intel_supported_features(struct spdk_nvme_ctrlr *ctrlr)
     920             : {
     921           1 :         ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_MAX_LBA] = true;
     922           1 :         ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_NATIVE_MAX_LBA] = true;
     923           1 :         ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_POWER_GOVERNOR_SETTING] = true;
     924           1 :         ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_SMBUS_ADDRESS] = true;
     925           1 :         ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_LED_PATTERN] = true;
     926           1 :         ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_RESET_TIMED_WORKLOAD_COUNTERS] = true;
     927           1 :         ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_LATENCY_TRACKING] = true;
     928           1 : }
     929             : 
     930             : static void
     931          18 : nvme_ctrlr_set_arbitration_feature(struct spdk_nvme_ctrlr *ctrlr)
     932             : {
     933             :         uint32_t cdw11;
     934             :         struct nvme_completion_poll_status *status;
     935             : 
     936          18 :         if (ctrlr->opts.arbitration_burst == 0) {
     937          16 :                 return;
     938             :         }
     939             : 
     940           2 :         if (ctrlr->opts.arbitration_burst > 7) {
     941           1 :                 NVME_CTRLR_WARNLOG(ctrlr, "Valid arbitration burst values is from 0-7\n");
     942           1 :                 return;
     943             :         }
     944             : 
     945           1 :         status = calloc(1, sizeof(*status));
     946           1 :         if (!status) {
     947           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
     948           0 :                 return;
     949             :         }
     950             : 
     951           1 :         cdw11 = ctrlr->opts.arbitration_burst;
     952             : 
     953           1 :         if (spdk_nvme_ctrlr_get_flags(ctrlr) & SPDK_NVME_CTRLR_WRR_SUPPORTED) {
     954           1 :                 cdw11 |= (uint32_t)ctrlr->opts.low_priority_weight << 8;
     955           1 :                 cdw11 |= (uint32_t)ctrlr->opts.medium_priority_weight << 16;
     956           1 :                 cdw11 |= (uint32_t)ctrlr->opts.high_priority_weight << 24;
     957             :         }
     958             : 
     959           1 :         if (spdk_nvme_ctrlr_cmd_set_feature(ctrlr, SPDK_NVME_FEAT_ARBITRATION,
     960             :                                             cdw11, 0, NULL, 0,
     961             :                                             nvme_completion_poll_cb, status) < 0) {
     962           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Set arbitration feature failed\n");
     963           0 :                 free(status);
     964           0 :                 return;
     965             :         }
     966             : 
     967           1 :         if (nvme_wait_for_completion_timeout(ctrlr->adminq, status,
     968           1 :                                              ctrlr->opts.admin_timeout_ms * 1000)) {
     969           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Timeout to set arbitration feature\n");
     970             :         }
     971             : 
     972           1 :         if (!status->timed_out) {
     973           1 :                 free(status);
     974             :         }
     975             : }
     976             : 
     977             : static void
     978          16 : nvme_ctrlr_set_supported_features(struct spdk_nvme_ctrlr *ctrlr)
     979             : {
     980          16 :         memset(ctrlr->feature_supported, 0, sizeof(ctrlr->feature_supported));
     981             :         /* Mandatory features */
     982          16 :         ctrlr->feature_supported[SPDK_NVME_FEAT_ARBITRATION] = true;
     983          16 :         ctrlr->feature_supported[SPDK_NVME_FEAT_POWER_MANAGEMENT] = true;
     984          16 :         ctrlr->feature_supported[SPDK_NVME_FEAT_TEMPERATURE_THRESHOLD] = true;
     985          16 :         ctrlr->feature_supported[SPDK_NVME_FEAT_ERROR_RECOVERY] = true;
     986          16 :         ctrlr->feature_supported[SPDK_NVME_FEAT_NUMBER_OF_QUEUES] = true;
     987          16 :         ctrlr->feature_supported[SPDK_NVME_FEAT_INTERRUPT_COALESCING] = true;
     988          16 :         ctrlr->feature_supported[SPDK_NVME_FEAT_INTERRUPT_VECTOR_CONFIGURATION] = true;
     989          16 :         ctrlr->feature_supported[SPDK_NVME_FEAT_WRITE_ATOMICITY] = true;
     990          16 :         ctrlr->feature_supported[SPDK_NVME_FEAT_ASYNC_EVENT_CONFIGURATION] = true;
     991             :         /* Optional features */
     992          16 :         if (ctrlr->cdata.vwc.present) {
     993           0 :                 ctrlr->feature_supported[SPDK_NVME_FEAT_VOLATILE_WRITE_CACHE] = true;
     994             :         }
     995          16 :         if (ctrlr->cdata.apsta.supported) {
     996           0 :                 ctrlr->feature_supported[SPDK_NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION] = true;
     997             :         }
     998          16 :         if (ctrlr->cdata.hmpre) {
     999           0 :                 ctrlr->feature_supported[SPDK_NVME_FEAT_HOST_MEM_BUFFER] = true;
    1000             :         }
    1001          16 :         if (ctrlr->cdata.vid == SPDK_PCI_VID_INTEL) {
    1002           1 :                 nvme_ctrlr_set_intel_supported_features(ctrlr);
    1003             :         }
    1004             : 
    1005          16 :         nvme_ctrlr_set_arbitration_feature(ctrlr);
    1006          16 : }
    1007             : 
    1008             : static void
    1009           1 : nvme_ctrlr_set_host_feature_done(void *arg, const struct spdk_nvme_cpl *cpl)
    1010             : {
    1011           1 :         struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg;
    1012             : 
    1013           1 :         spdk_free(ctrlr->tmp_ptr);
    1014           1 :         ctrlr->tmp_ptr = NULL;
    1015             : 
    1016           1 :         if (spdk_nvme_cpl_is_error(cpl)) {
    1017           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Set host behavior support feature failed: SC %x SCT %x\n",
    1018             :                                   cpl->status.sc, cpl->status.sct);
    1019           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    1020           0 :                 return;
    1021             :         }
    1022             : 
    1023           1 :         ctrlr->feature_supported[SPDK_NVME_FEAT_HOST_BEHAVIOR_SUPPORT] = true;
    1024             : 
    1025           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_DB_BUF_CFG,
    1026           1 :                              ctrlr->opts.admin_timeout_ms);
    1027             : }
    1028             : 
    1029             : /* We do not want to do add synchronous operation anymore.
    1030             :  * We set the Host Behavior Support feature asynchronousin in different states.
    1031             :  */
    1032             : static int
    1033          16 : nvme_ctrlr_set_host_feature(struct spdk_nvme_ctrlr *ctrlr)
    1034             : {
    1035             :         struct spdk_nvme_host_behavior *host;
    1036             :         int rc;
    1037             : 
    1038          16 :         if (!ctrlr->cdata.ctratt.bits.elbas) {
    1039          15 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_DB_BUF_CFG,
    1040          15 :                                      ctrlr->opts.admin_timeout_ms);
    1041          15 :                 return 0;
    1042             :         }
    1043             : 
    1044           1 :         ctrlr->tmp_ptr = spdk_dma_zmalloc(sizeof(struct spdk_nvme_host_behavior), 4096, NULL);
    1045           1 :         if (!ctrlr->tmp_ptr) {
    1046           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate host behavior support data\n");
    1047           0 :                 rc = -ENOMEM;
    1048           0 :                 goto error;
    1049             :         }
    1050             : 
    1051           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_SET_HOST_FEATURE,
    1052           1 :                              ctrlr->opts.admin_timeout_ms);
    1053             : 
    1054           1 :         host = ctrlr->tmp_ptr;
    1055             : 
    1056           1 :         host->lbafee = 1;
    1057             : 
    1058           1 :         rc = spdk_nvme_ctrlr_cmd_set_feature(ctrlr, SPDK_NVME_FEAT_HOST_BEHAVIOR_SUPPORT,
    1059             :                                              0, 0, host, sizeof(struct spdk_nvme_host_behavior),
    1060             :                                              nvme_ctrlr_set_host_feature_done, ctrlr);
    1061           1 :         if (rc != 0) {
    1062           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Set host behavior support feature failed: %d\n", rc);
    1063           0 :                 goto error;
    1064             :         }
    1065             : 
    1066           1 :         return 0;
    1067             : 
    1068           0 : error:
    1069           0 :         spdk_free(ctrlr->tmp_ptr);
    1070           0 :         ctrlr->tmp_ptr = NULL;
    1071             : 
    1072           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    1073           0 :         return rc;
    1074             : }
    1075             : 
    1076             : bool
    1077           0 : spdk_nvme_ctrlr_is_failed(struct spdk_nvme_ctrlr *ctrlr)
    1078             : {
    1079           0 :         return ctrlr->is_failed;
    1080             : }
    1081             : 
    1082             : void
    1083           1 : nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr, bool hot_remove)
    1084             : {
    1085             :         /*
    1086             :          * Set the flag here and leave the work failure of qpairs to
    1087             :          * spdk_nvme_qpair_process_completions().
    1088             :          */
    1089           1 :         if (hot_remove) {
    1090           0 :                 ctrlr->is_removed = true;
    1091             :         }
    1092             : 
    1093           1 :         if (ctrlr->is_failed) {
    1094           0 :                 NVME_CTRLR_NOTICELOG(ctrlr, "already in failed state\n");
    1095           0 :                 return;
    1096             :         }
    1097             : 
    1098           1 :         if (ctrlr->is_disconnecting) {
    1099           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "already disconnecting\n");
    1100           0 :                 return;
    1101             :         }
    1102             : 
    1103           1 :         ctrlr->is_failed = true;
    1104           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    1105           1 :         nvme_transport_ctrlr_disconnect_qpair(ctrlr, ctrlr->adminq);
    1106           1 :         NVME_CTRLR_ERRLOG(ctrlr, "in failed state.\n");
    1107             : }
    1108             : 
    1109             : /**
    1110             :  * This public API function will try to take the controller lock.
    1111             :  * Any private functions being called from a thread already holding
    1112             :  * the ctrlr lock should call nvme_ctrlr_fail directly.
    1113             :  */
    1114             : void
    1115           0 : spdk_nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr)
    1116             : {
    1117           0 :         nvme_ctrlr_lock(ctrlr);
    1118           0 :         nvme_ctrlr_fail(ctrlr, false);
    1119           0 :         nvme_ctrlr_unlock(ctrlr);
    1120           0 : }
    1121             : 
    1122             : static void
    1123          39 : nvme_ctrlr_shutdown_set_cc_done(void *_ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    1124             : {
    1125          39 :         struct nvme_ctrlr_detach_ctx *ctx = _ctx;
    1126          39 :         struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr;
    1127             : 
    1128          39 :         if (spdk_nvme_cpl_is_error(cpl)) {
    1129           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to write CC.SHN\n");
    1130           0 :                 ctx->shutdown_complete = true;
    1131           0 :                 return;
    1132             :         }
    1133             : 
    1134          39 :         if (ctrlr->opts.no_shn_notification) {
    1135           0 :                 ctx->shutdown_complete = true;
    1136           0 :                 return;
    1137             :         }
    1138             : 
    1139             :         /*
    1140             :          * The NVMe specification defines RTD3E to be the time between
    1141             :          *  setting SHN = 1 until the controller will set SHST = 10b.
    1142             :          * If the device doesn't report RTD3 entry latency, or if it
    1143             :          *  reports RTD3 entry latency less than 10 seconds, pick
    1144             :          *  10 seconds as a reasonable amount of time to
    1145             :          *  wait before proceeding.
    1146             :          */
    1147          39 :         NVME_CTRLR_DEBUGLOG(ctrlr, "RTD3E = %" PRIu32 " us\n", ctrlr->cdata.rtd3e);
    1148          39 :         ctx->shutdown_timeout_ms = SPDK_CEIL_DIV(ctrlr->cdata.rtd3e, 1000);
    1149          39 :         ctx->shutdown_timeout_ms = spdk_max(ctx->shutdown_timeout_ms, 10000);
    1150          39 :         NVME_CTRLR_DEBUGLOG(ctrlr, "shutdown timeout = %" PRIu32 " ms\n", ctx->shutdown_timeout_ms);
    1151             : 
    1152          39 :         ctx->shutdown_start_tsc = spdk_get_ticks();
    1153          39 :         ctx->state = NVME_CTRLR_DETACH_CHECK_CSTS;
    1154             : }
    1155             : 
    1156             : static void
    1157          39 : nvme_ctrlr_shutdown_get_cc_done(void *_ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    1158             : {
    1159          39 :         struct nvme_ctrlr_detach_ctx *ctx = _ctx;
    1160          39 :         struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr;
    1161             :         union spdk_nvme_cc_register cc;
    1162             :         int rc;
    1163             : 
    1164          39 :         if (spdk_nvme_cpl_is_error(cpl)) {
    1165           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the CC register\n");
    1166           0 :                 ctx->shutdown_complete = true;
    1167           0 :                 return;
    1168             :         }
    1169             : 
    1170          39 :         assert(value <= UINT32_MAX);
    1171          39 :         cc.raw = (uint32_t)value;
    1172             : 
    1173          39 :         if (ctrlr->opts.no_shn_notification) {
    1174           0 :                 NVME_CTRLR_INFOLOG(ctrlr, "Disable SSD without shutdown notification\n");
    1175           0 :                 if (cc.bits.en == 0) {
    1176           0 :                         ctx->shutdown_complete = true;
    1177           0 :                         return;
    1178             :                 }
    1179             : 
    1180           0 :                 cc.bits.en = 0;
    1181             :         } else {
    1182          39 :                 cc.bits.shn = SPDK_NVME_SHN_NORMAL;
    1183             :         }
    1184             : 
    1185          39 :         rc = nvme_ctrlr_set_cc_async(ctrlr, cc.raw, nvme_ctrlr_shutdown_set_cc_done, ctx);
    1186          39 :         if (rc != 0) {
    1187           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to write CC.SHN\n");
    1188           0 :                 ctx->shutdown_complete = true;
    1189             :         }
    1190             : }
    1191             : 
    1192             : static void
    1193          47 : nvme_ctrlr_shutdown_async(struct spdk_nvme_ctrlr *ctrlr,
    1194             :                           struct nvme_ctrlr_detach_ctx *ctx)
    1195             : {
    1196             :         int rc;
    1197             : 
    1198          47 :         if (ctrlr->is_removed) {
    1199           0 :                 ctx->shutdown_complete = true;
    1200           0 :                 return;
    1201             :         }
    1202             : 
    1203          47 :         if (ctrlr->adminq == NULL ||
    1204          40 :             ctrlr->adminq->transport_failure_reason != SPDK_NVME_QPAIR_FAILURE_NONE) {
    1205           8 :                 NVME_CTRLR_INFOLOG(ctrlr, "Adminq is not connected.\n");
    1206           8 :                 ctx->shutdown_complete = true;
    1207           8 :                 return;
    1208             :         }
    1209             : 
    1210          39 :         ctx->state = NVME_CTRLR_DETACH_SET_CC;
    1211          39 :         rc = nvme_ctrlr_get_cc_async(ctrlr, nvme_ctrlr_shutdown_get_cc_done, ctx);
    1212          39 :         if (rc != 0) {
    1213           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the CC register\n");
    1214           0 :                 ctx->shutdown_complete = true;
    1215             :         }
    1216             : }
    1217             : 
    1218             : static void
    1219          39 : nvme_ctrlr_shutdown_get_csts_done(void *_ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    1220             : {
    1221          39 :         struct nvme_ctrlr_detach_ctx *ctx = _ctx;
    1222             : 
    1223          39 :         if (spdk_nvme_cpl_is_error(cpl)) {
    1224           0 :                 NVME_CTRLR_ERRLOG(ctx->ctrlr, "Failed to read the CSTS register\n");
    1225           0 :                 ctx->shutdown_complete = true;
    1226           0 :                 return;
    1227             :         }
    1228             : 
    1229          39 :         assert(value <= UINT32_MAX);
    1230          39 :         ctx->csts.raw = (uint32_t)value;
    1231          39 :         ctx->state = NVME_CTRLR_DETACH_GET_CSTS_DONE;
    1232             : }
    1233             : 
    1234             : static int
    1235          78 : nvme_ctrlr_shutdown_poll_async(struct spdk_nvme_ctrlr *ctrlr,
    1236             :                                struct nvme_ctrlr_detach_ctx *ctx)
    1237             : {
    1238             :         union spdk_nvme_csts_register   csts;
    1239             :         uint32_t                        ms_waited;
    1240             : 
    1241          78 :         switch (ctx->state) {
    1242           0 :         case NVME_CTRLR_DETACH_SET_CC:
    1243             :         case NVME_CTRLR_DETACH_GET_CSTS:
    1244             :                 /* We're still waiting for the register operation to complete */
    1245           0 :                 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
    1246           0 :                 return -EAGAIN;
    1247             : 
    1248          39 :         case NVME_CTRLR_DETACH_CHECK_CSTS:
    1249          39 :                 ctx->state = NVME_CTRLR_DETACH_GET_CSTS;
    1250          39 :                 if (nvme_ctrlr_get_csts_async(ctrlr, nvme_ctrlr_shutdown_get_csts_done, ctx)) {
    1251           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the CSTS register\n");
    1252           0 :                         return -EIO;
    1253             :                 }
    1254          39 :                 return -EAGAIN;
    1255             : 
    1256          39 :         case NVME_CTRLR_DETACH_GET_CSTS_DONE:
    1257          39 :                 ctx->state = NVME_CTRLR_DETACH_CHECK_CSTS;
    1258          39 :                 break;
    1259             : 
    1260           0 :         default:
    1261           0 :                 assert(0 && "Should never happen");
    1262             :                 return -EINVAL;
    1263             :         }
    1264             : 
    1265          39 :         ms_waited = (spdk_get_ticks() - ctx->shutdown_start_tsc) * 1000 / spdk_get_ticks_hz();
    1266          39 :         csts.raw = ctx->csts.raw;
    1267             : 
    1268          39 :         if (csts.bits.shst == SPDK_NVME_SHST_COMPLETE) {
    1269          39 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "shutdown complete in %u milliseconds\n", ms_waited);
    1270          39 :                 return 0;
    1271             :         }
    1272             : 
    1273           0 :         if (ms_waited < ctx->shutdown_timeout_ms) {
    1274           0 :                 return -EAGAIN;
    1275             :         }
    1276             : 
    1277           0 :         NVME_CTRLR_ERRLOG(ctrlr, "did not shutdown within %u milliseconds\n",
    1278             :                           ctx->shutdown_timeout_ms);
    1279           0 :         if (ctrlr->quirks & NVME_QUIRK_SHST_COMPLETE) {
    1280           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "likely due to shutdown handling in the VMWare emulated NVMe SSD\n");
    1281             :         }
    1282             : 
    1283           0 :         return 0;
    1284             : }
    1285             : 
    1286             : static inline uint64_t
    1287         509 : nvme_ctrlr_get_ready_timeout(struct spdk_nvme_ctrlr *ctrlr)
    1288             : {
    1289         509 :         return ctrlr->cap.bits.to * 500;
    1290             : }
    1291             : 
    1292             : static void
    1293          14 : nvme_ctrlr_set_cc_en_done(void *ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    1294             : {
    1295          14 :         struct spdk_nvme_ctrlr *ctrlr = ctx;
    1296             : 
    1297          14 :         if (spdk_nvme_cpl_is_error(cpl)) {
    1298           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to set the CC register\n");
    1299           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    1300           0 :                 return;
    1301             :         }
    1302             : 
    1303          14 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1,
    1304             :                              nvme_ctrlr_get_ready_timeout(ctrlr));
    1305             : }
    1306             : 
    1307             : static int
    1308          21 : nvme_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr)
    1309             : {
    1310             :         union spdk_nvme_cc_register     cc;
    1311             :         int                             rc;
    1312             : 
    1313          21 :         rc = nvme_transport_ctrlr_enable(ctrlr);
    1314          21 :         if (rc != 0) {
    1315           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "transport ctrlr_enable failed\n");
    1316           0 :                 return rc;
    1317             :         }
    1318             : 
    1319          21 :         cc.raw = ctrlr->process_init_cc.raw;
    1320          21 :         if (cc.bits.en != 0) {
    1321           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "called with CC.EN = 1\n");
    1322           0 :                 return -EINVAL;
    1323             :         }
    1324             : 
    1325          21 :         cc.bits.en = 1;
    1326          21 :         cc.bits.css = 0;
    1327          21 :         cc.bits.shn = 0;
    1328          21 :         cc.bits.iosqes = 6; /* SQ entry size == 64 == 2^6 */
    1329          21 :         cc.bits.iocqes = 4; /* CQ entry size == 16 == 2^4 */
    1330             : 
    1331             :         /* Page size is 2 ^ (12 + mps). */
    1332          21 :         cc.bits.mps = spdk_u32log2(ctrlr->page_size) - 12;
    1333             : 
    1334             :         /*
    1335             :          * Since NVMe 1.0, a controller should have at least one bit set in CAP.CSS.
    1336             :          * A controller that does not have any bit set in CAP.CSS is not spec compliant.
    1337             :          * Try to support such a controller regardless.
    1338             :          */
    1339          21 :         if (ctrlr->cap.bits.css == 0) {
    1340          21 :                 NVME_CTRLR_INFOLOG(ctrlr, "Drive reports no command sets supported. Assuming NVM is supported.\n");
    1341          21 :                 ctrlr->cap.bits.css = SPDK_NVME_CAP_CSS_NVM;
    1342             :         }
    1343             : 
    1344             :         /*
    1345             :          * If the user did not explicitly request a command set, or supplied a value larger than
    1346             :          * what can be saved in CC.CSS, use the most reasonable default.
    1347             :          */
    1348          21 :         if (ctrlr->opts.command_set >= CHAR_BIT) {
    1349           0 :                 if (ctrlr->cap.bits.css & SPDK_NVME_CAP_CSS_IOCS) {
    1350           0 :                         ctrlr->opts.command_set = SPDK_NVME_CC_CSS_IOCS;
    1351           0 :                 } else if (ctrlr->cap.bits.css & SPDK_NVME_CAP_CSS_NVM) {
    1352           0 :                         ctrlr->opts.command_set = SPDK_NVME_CC_CSS_NVM;
    1353           0 :                 } else if (ctrlr->cap.bits.css & SPDK_NVME_CAP_CSS_NOIO) {
    1354           0 :                         ctrlr->opts.command_set = SPDK_NVME_CC_CSS_NOIO;
    1355             :                 } else {
    1356             :                         /* Invalid supported bits detected, falling back to NVM. */
    1357           0 :                         ctrlr->opts.command_set = SPDK_NVME_CC_CSS_NVM;
    1358             :                 }
    1359             :         }
    1360             : 
    1361             :         /* Verify that the selected command set is supported by the controller. */
    1362          21 :         if (!(ctrlr->cap.bits.css & (1u << ctrlr->opts.command_set))) {
    1363           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Requested I/O command set %u but supported mask is 0x%x\n",
    1364             :                                     ctrlr->opts.command_set, ctrlr->cap.bits.css);
    1365           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Falling back to NVM. Assuming NVM is supported.\n");
    1366           0 :                 ctrlr->opts.command_set = SPDK_NVME_CC_CSS_NVM;
    1367             :         }
    1368             : 
    1369          21 :         cc.bits.css = ctrlr->opts.command_set;
    1370             : 
    1371          21 :         switch (ctrlr->opts.arb_mechanism) {
    1372          10 :         case SPDK_NVME_CC_AMS_RR:
    1373          10 :                 break;
    1374           4 :         case SPDK_NVME_CC_AMS_WRR:
    1375           4 :                 if (SPDK_NVME_CAP_AMS_WRR & ctrlr->cap.bits.ams) {
    1376           2 :                         break;
    1377             :                 }
    1378           2 :                 return -EINVAL;
    1379           4 :         case SPDK_NVME_CC_AMS_VS:
    1380           4 :                 if (SPDK_NVME_CAP_AMS_VS & ctrlr->cap.bits.ams) {
    1381           2 :                         break;
    1382             :                 }
    1383           2 :                 return -EINVAL;
    1384           3 :         default:
    1385           3 :                 return -EINVAL;
    1386             :         }
    1387             : 
    1388          14 :         cc.bits.ams = ctrlr->opts.arb_mechanism;
    1389          14 :         ctrlr->process_init_cc.raw = cc.raw;
    1390             : 
    1391          14 :         if (nvme_ctrlr_set_cc_async(ctrlr, cc.raw, nvme_ctrlr_set_cc_en_done, ctrlr)) {
    1392           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "set_cc() failed\n");
    1393           0 :                 return -EIO;
    1394             :         }
    1395             : 
    1396          14 :         return 0;
    1397             : }
    1398             : 
    1399             : static const char *
    1400           1 : nvme_ctrlr_state_string(enum nvme_ctrlr_state state)
    1401             : {
    1402           1 :         switch (state) {
    1403           0 :         case NVME_CTRLR_STATE_INIT_DELAY:
    1404           0 :                 return "delay init";
    1405           0 :         case NVME_CTRLR_STATE_CONNECT_ADMINQ:
    1406           0 :                 return "connect adminq";
    1407           0 :         case NVME_CTRLR_STATE_WAIT_FOR_CONNECT_ADMINQ:
    1408           0 :                 return "wait for connect adminq";
    1409           0 :         case NVME_CTRLR_STATE_READ_VS:
    1410           0 :                 return "read vs";
    1411           0 :         case NVME_CTRLR_STATE_READ_VS_WAIT_FOR_VS:
    1412           0 :                 return "read vs wait for vs";
    1413           0 :         case NVME_CTRLR_STATE_READ_CAP:
    1414           0 :                 return "read cap";
    1415           0 :         case NVME_CTRLR_STATE_READ_CAP_WAIT_FOR_CAP:
    1416           0 :                 return "read cap wait for cap";
    1417           0 :         case NVME_CTRLR_STATE_CHECK_EN:
    1418           0 :                 return "check en";
    1419           0 :         case NVME_CTRLR_STATE_CHECK_EN_WAIT_FOR_CC:
    1420           0 :                 return "check en wait for cc";
    1421           0 :         case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1:
    1422           0 :                 return "disable and wait for CSTS.RDY = 1";
    1423           0 :         case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS:
    1424           0 :                 return "disable and wait for CSTS.RDY = 1 reg";
    1425           0 :         case NVME_CTRLR_STATE_SET_EN_0:
    1426           0 :                 return "set CC.EN = 0";
    1427           0 :         case NVME_CTRLR_STATE_SET_EN_0_WAIT_FOR_CC:
    1428           0 :                 return "set CC.EN = 0 wait for cc";
    1429           0 :         case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0:
    1430           0 :                 return "disable and wait for CSTS.RDY = 0";
    1431           0 :         case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0_WAIT_FOR_CSTS:
    1432           0 :                 return "disable and wait for CSTS.RDY = 0 reg";
    1433           0 :         case NVME_CTRLR_STATE_DISABLED:
    1434           0 :                 return "controller is disabled";
    1435           0 :         case NVME_CTRLR_STATE_ENABLE:
    1436           0 :                 return "enable controller by writing CC.EN = 1";
    1437           0 :         case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_CC:
    1438           0 :                 return "enable controller by writing CC.EN = 1 reg";
    1439           0 :         case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1:
    1440           0 :                 return "wait for CSTS.RDY = 1";
    1441           0 :         case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS:
    1442           0 :                 return "wait for CSTS.RDY = 1 reg";
    1443           0 :         case NVME_CTRLR_STATE_RESET_ADMIN_QUEUE:
    1444           0 :                 return "reset admin queue";
    1445           0 :         case NVME_CTRLR_STATE_IDENTIFY:
    1446           0 :                 return "identify controller";
    1447           0 :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY:
    1448           0 :                 return "wait for identify controller";
    1449           0 :         case NVME_CTRLR_STATE_CONFIGURE_AER:
    1450           0 :                 return "configure AER";
    1451           0 :         case NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER:
    1452           0 :                 return "wait for configure aer";
    1453           0 :         case NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT:
    1454           0 :                 return "set keep alive timeout";
    1455           0 :         case NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT:
    1456           0 :                 return "wait for set keep alive timeout";
    1457           0 :         case NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC:
    1458           0 :                 return "identify controller iocs specific";
    1459           0 :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_IOCS_SPECIFIC:
    1460           0 :                 return "wait for identify controller iocs specific";
    1461           0 :         case NVME_CTRLR_STATE_GET_ZNS_CMD_EFFECTS_LOG:
    1462           0 :                 return "get zns cmd and effects log page";
    1463           0 :         case NVME_CTRLR_STATE_WAIT_FOR_GET_ZNS_CMD_EFFECTS_LOG:
    1464           0 :                 return "wait for get zns cmd and effects log page";
    1465           0 :         case NVME_CTRLR_STATE_SET_NUM_QUEUES:
    1466           0 :                 return "set number of queues";
    1467           0 :         case NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES:
    1468           0 :                 return "wait for set number of queues";
    1469           0 :         case NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS:
    1470           0 :                 return "identify active ns";
    1471           0 :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS:
    1472           0 :                 return "wait for identify active ns";
    1473           0 :         case NVME_CTRLR_STATE_IDENTIFY_NS:
    1474           0 :                 return "identify ns";
    1475           0 :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS:
    1476           0 :                 return "wait for identify ns";
    1477           0 :         case NVME_CTRLR_STATE_IDENTIFY_ID_DESCS:
    1478           0 :                 return "identify namespace id descriptors";
    1479           0 :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS:
    1480           0 :                 return "wait for identify namespace id descriptors";
    1481           0 :         case NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC:
    1482           0 :                 return "identify ns iocs specific";
    1483           0 :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS_IOCS_SPECIFIC:
    1484           0 :                 return "wait for identify ns iocs specific";
    1485           0 :         case NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES:
    1486           0 :                 return "set supported log pages";
    1487           0 :         case NVME_CTRLR_STATE_SET_SUPPORTED_INTEL_LOG_PAGES:
    1488           0 :                 return "set supported INTEL log pages";
    1489           0 :         case NVME_CTRLR_STATE_WAIT_FOR_SUPPORTED_INTEL_LOG_PAGES:
    1490           0 :                 return "wait for supported INTEL log pages";
    1491           0 :         case NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES:
    1492           0 :                 return "set supported features";
    1493           0 :         case NVME_CTRLR_STATE_SET_HOST_FEATURE:
    1494           0 :                 return "set host behavior support feature";
    1495           0 :         case NVME_CTRLR_STATE_WAIT_FOR_SET_HOST_FEATURE:
    1496           0 :                 return "wait for set host behavior support feature";
    1497           0 :         case NVME_CTRLR_STATE_SET_DB_BUF_CFG:
    1498           0 :                 return "set doorbell buffer config";
    1499           0 :         case NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG:
    1500           0 :                 return "wait for doorbell buffer config";
    1501           0 :         case NVME_CTRLR_STATE_SET_HOST_ID:
    1502           0 :                 return "set host ID";
    1503           0 :         case NVME_CTRLR_STATE_WAIT_FOR_HOST_ID:
    1504           0 :                 return "wait for set host ID";
    1505           0 :         case NVME_CTRLR_STATE_TRANSPORT_READY:
    1506           0 :                 return "transport ready";
    1507           0 :         case NVME_CTRLR_STATE_READY:
    1508           0 :                 return "ready";
    1509           1 :         case NVME_CTRLR_STATE_ERROR:
    1510           1 :                 return "error";
    1511           0 :         case NVME_CTRLR_STATE_DISCONNECTED:
    1512           0 :                 return "disconnected";
    1513             :         }
    1514           0 :         return "unknown";
    1515             : };
    1516             : 
    1517             : static void
    1518         732 : _nvme_ctrlr_set_state(struct spdk_nvme_ctrlr *ctrlr, enum nvme_ctrlr_state state,
    1519             :                       uint64_t timeout_in_ms, bool quiet)
    1520             : {
    1521             :         uint64_t ticks_per_ms, timeout_in_ticks, now_ticks;
    1522             : 
    1523         732 :         ctrlr->state = state;
    1524         732 :         if (timeout_in_ms == NVME_TIMEOUT_KEEP_EXISTING) {
    1525          33 :                 if (!quiet) {
    1526           0 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "setting state to %s (keeping existing timeout)\n",
    1527             :                                             nvme_ctrlr_state_string(ctrlr->state));
    1528             :                 }
    1529          33 :                 return;
    1530             :         }
    1531             : 
    1532         699 :         if (timeout_in_ms == NVME_TIMEOUT_INFINITE) {
    1533         697 :                 goto inf;
    1534             :         }
    1535             : 
    1536           2 :         ticks_per_ms = spdk_get_ticks_hz() / 1000;
    1537           2 :         if (timeout_in_ms > UINT64_MAX / ticks_per_ms) {
    1538           0 :                 NVME_CTRLR_ERRLOG(ctrlr,
    1539             :                                   "Specified timeout would cause integer overflow. Defaulting to no timeout.\n");
    1540           0 :                 goto inf;
    1541             :         }
    1542             : 
    1543           2 :         now_ticks = spdk_get_ticks();
    1544           2 :         timeout_in_ticks = timeout_in_ms * ticks_per_ms;
    1545           2 :         if (timeout_in_ticks > UINT64_MAX - now_ticks) {
    1546           1 :                 NVME_CTRLR_ERRLOG(ctrlr,
    1547             :                                   "Specified timeout would cause integer overflow. Defaulting to no timeout.\n");
    1548           1 :                 goto inf;
    1549             :         }
    1550             : 
    1551           1 :         ctrlr->state_timeout_tsc = timeout_in_ticks + now_ticks;
    1552           1 :         if (!quiet) {
    1553           1 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "setting state to %s (timeout %" PRIu64 " ms)\n",
    1554             :                                     nvme_ctrlr_state_string(ctrlr->state), timeout_in_ms);
    1555             :         }
    1556           1 :         return;
    1557         698 : inf:
    1558         698 :         if (!quiet) {
    1559         698 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "setting state to %s (no timeout)\n",
    1560             :                                     nvme_ctrlr_state_string(ctrlr->state));
    1561             :         }
    1562         698 :         ctrlr->state_timeout_tsc = NVME_TIMEOUT_INFINITE;
    1563             : }
    1564             : 
    1565             : static void
    1566         699 : nvme_ctrlr_set_state(struct spdk_nvme_ctrlr *ctrlr, enum nvme_ctrlr_state state,
    1567             :                      uint64_t timeout_in_ms)
    1568             : {
    1569         699 :         _nvme_ctrlr_set_state(ctrlr, state, timeout_in_ms, false);
    1570         699 : }
    1571             : 
    1572             : static void
    1573          33 : nvme_ctrlr_set_state_quiet(struct spdk_nvme_ctrlr *ctrlr, enum nvme_ctrlr_state state,
    1574             :                            uint64_t timeout_in_ms)
    1575             : {
    1576          33 :         _nvme_ctrlr_set_state(ctrlr, state, timeout_in_ms, true);
    1577          33 : }
    1578             : 
    1579             : static void
    1580          48 : nvme_ctrlr_free_zns_specific_data(struct spdk_nvme_ctrlr *ctrlr)
    1581             : {
    1582          48 :         spdk_free(ctrlr->cdata_zns);
    1583          48 :         ctrlr->cdata_zns = NULL;
    1584          48 : }
    1585             : 
    1586             : static void
    1587          48 : nvme_ctrlr_free_iocs_specific_data(struct spdk_nvme_ctrlr *ctrlr)
    1588             : {
    1589          48 :         nvme_ctrlr_free_zns_specific_data(ctrlr);
    1590          48 : }
    1591             : 
    1592             : static void
    1593          49 : nvme_ctrlr_free_doorbell_buffer(struct spdk_nvme_ctrlr *ctrlr)
    1594             : {
    1595          49 :         if (ctrlr->shadow_doorbell) {
    1596           1 :                 spdk_free(ctrlr->shadow_doorbell);
    1597           1 :                 ctrlr->shadow_doorbell = NULL;
    1598             :         }
    1599             : 
    1600          49 :         if (ctrlr->eventidx) {
    1601           1 :                 spdk_free(ctrlr->eventidx);
    1602           1 :                 ctrlr->eventidx = NULL;
    1603             :         }
    1604          49 : }
    1605             : 
    1606             : static void
    1607           1 : nvme_ctrlr_set_doorbell_buffer_config_done(void *arg, const struct spdk_nvme_cpl *cpl)
    1608             : {
    1609           1 :         struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg;
    1610             : 
    1611           1 :         if (spdk_nvme_cpl_is_error(cpl)) {
    1612           0 :                 NVME_CTRLR_WARNLOG(ctrlr, "Doorbell buffer config failed\n");
    1613             :         } else {
    1614           1 :                 NVME_CTRLR_INFOLOG(ctrlr, "Doorbell buffer config enabled\n");
    1615             :         }
    1616           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID,
    1617           1 :                              ctrlr->opts.admin_timeout_ms);
    1618           1 : }
    1619             : 
    1620             : static int
    1621          15 : nvme_ctrlr_set_doorbell_buffer_config(struct spdk_nvme_ctrlr *ctrlr)
    1622             : {
    1623          15 :         int rc = 0;
    1624          15 :         uint64_t prp1, prp2, len;
    1625             : 
    1626          15 :         if (!ctrlr->cdata.oacs.doorbell_buffer_config) {
    1627          14 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID,
    1628          14 :                                      ctrlr->opts.admin_timeout_ms);
    1629          14 :                 return 0;
    1630             :         }
    1631             : 
    1632           1 :         if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) {
    1633           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID,
    1634           0 :                                      ctrlr->opts.admin_timeout_ms);
    1635           0 :                 return 0;
    1636             :         }
    1637             : 
    1638             :         /* only 1 page size for doorbell buffer */
    1639           1 :         ctrlr->shadow_doorbell = spdk_zmalloc(ctrlr->page_size, ctrlr->page_size,
    1640             :                                               NULL, SPDK_ENV_LCORE_ID_ANY,
    1641             :                                               SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE);
    1642           1 :         if (ctrlr->shadow_doorbell == NULL) {
    1643           0 :                 rc = -ENOMEM;
    1644           0 :                 goto error;
    1645             :         }
    1646             : 
    1647           1 :         len = ctrlr->page_size;
    1648           1 :         prp1 = spdk_vtophys(ctrlr->shadow_doorbell, &len);
    1649           1 :         if (prp1 == SPDK_VTOPHYS_ERROR || len != ctrlr->page_size) {
    1650           0 :                 rc = -EFAULT;
    1651           0 :                 goto error;
    1652             :         }
    1653             : 
    1654           1 :         ctrlr->eventidx = spdk_zmalloc(ctrlr->page_size, ctrlr->page_size,
    1655             :                                        NULL, SPDK_ENV_LCORE_ID_ANY,
    1656             :                                        SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE);
    1657           1 :         if (ctrlr->eventidx == NULL) {
    1658           0 :                 rc = -ENOMEM;
    1659           0 :                 goto error;
    1660             :         }
    1661             : 
    1662           1 :         len = ctrlr->page_size;
    1663           1 :         prp2 = spdk_vtophys(ctrlr->eventidx, &len);
    1664           1 :         if (prp2 == SPDK_VTOPHYS_ERROR || len != ctrlr->page_size) {
    1665           0 :                 rc = -EFAULT;
    1666           0 :                 goto error;
    1667             :         }
    1668             : 
    1669           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG,
    1670           1 :                              ctrlr->opts.admin_timeout_ms);
    1671             : 
    1672           1 :         rc = nvme_ctrlr_cmd_doorbell_buffer_config(ctrlr, prp1, prp2,
    1673             :                         nvme_ctrlr_set_doorbell_buffer_config_done, ctrlr);
    1674           1 :         if (rc != 0) {
    1675           0 :                 goto error;
    1676             :         }
    1677             : 
    1678           1 :         return 0;
    1679             : 
    1680           0 : error:
    1681           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    1682           0 :         nvme_ctrlr_free_doorbell_buffer(ctrlr);
    1683           0 :         return rc;
    1684             : }
    1685             : 
    1686             : void
    1687          48 : nvme_ctrlr_abort_queued_aborts(struct spdk_nvme_ctrlr *ctrlr)
    1688             : {
    1689             :         struct nvme_request     *req, *tmp;
    1690          48 :         struct spdk_nvme_cpl    cpl = {};
    1691             : 
    1692          48 :         cpl.status.sc = SPDK_NVME_SC_ABORTED_SQ_DELETION;
    1693          48 :         cpl.status.sct = SPDK_NVME_SCT_GENERIC;
    1694             : 
    1695          48 :         STAILQ_FOREACH_SAFE(req, &ctrlr->queued_aborts, stailq, tmp) {
    1696           0 :                 STAILQ_REMOVE_HEAD(&ctrlr->queued_aborts, stailq);
    1697           0 :                 ctrlr->outstanding_aborts++;
    1698             : 
    1699           0 :                 nvme_complete_request(req->cb_fn, req->cb_arg, req->qpair, req, &cpl);
    1700             :         }
    1701          48 : }
    1702             : 
    1703             : static int
    1704           2 : nvme_ctrlr_disconnect(struct spdk_nvme_ctrlr *ctrlr)
    1705             : {
    1706           2 :         if (ctrlr->is_resetting || ctrlr->is_removed) {
    1707             :                 /*
    1708             :                  * Controller is already resetting or has been removed. Return
    1709             :                  *  immediately since there is no need to kick off another
    1710             :                  *  reset in these cases.
    1711             :                  */
    1712           1 :                 return ctrlr->is_resetting ? -EBUSY : -ENXIO;
    1713             :         }
    1714             : 
    1715           1 :         ctrlr->is_resetting = true;
    1716           1 :         ctrlr->is_failed = false;
    1717           1 :         ctrlr->is_disconnecting = true;
    1718           1 :         ctrlr->prepare_for_reset = true;
    1719             : 
    1720           1 :         NVME_CTRLR_NOTICELOG(ctrlr, "resetting controller\n");
    1721             : 
    1722             :         /* Disable keep-alive, it'll be re-enabled as part of the init process */
    1723           1 :         ctrlr->keep_alive_interval_ticks = 0;
    1724             : 
    1725             :         /* Abort all of the queued abort requests */
    1726           1 :         nvme_ctrlr_abort_queued_aborts(ctrlr);
    1727             : 
    1728           1 :         nvme_transport_admin_qpair_abort_aers(ctrlr->adminq);
    1729             : 
    1730           1 :         ctrlr->adminq->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL;
    1731           1 :         nvme_transport_ctrlr_disconnect_qpair(ctrlr, ctrlr->adminq);
    1732             : 
    1733           1 :         return 0;
    1734             : }
    1735             : 
    1736             : static void
    1737           1 : nvme_ctrlr_disconnect_done(struct spdk_nvme_ctrlr *ctrlr)
    1738             : {
    1739           1 :         assert(ctrlr->is_failed == false);
    1740           1 :         ctrlr->is_disconnecting = false;
    1741             : 
    1742             :         /* Doorbell buffer config is invalid during reset */
    1743           1 :         nvme_ctrlr_free_doorbell_buffer(ctrlr);
    1744             : 
    1745             :         /* I/O Command Set Specific Identify Controller data is invalidated during reset */
    1746           1 :         nvme_ctrlr_free_iocs_specific_data(ctrlr);
    1747             : 
    1748           1 :         spdk_bit_array_free(&ctrlr->free_io_qids);
    1749             : 
    1750             :         /* Set the state back to DISCONNECTED to cause a full hardware reset. */
    1751           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISCONNECTED, NVME_TIMEOUT_INFINITE);
    1752           1 : }
    1753             : 
    1754             : int
    1755           0 : spdk_nvme_ctrlr_disconnect(struct spdk_nvme_ctrlr *ctrlr)
    1756             : {
    1757             :         int rc;
    1758             : 
    1759           0 :         nvme_ctrlr_lock(ctrlr);
    1760           0 :         rc = nvme_ctrlr_disconnect(ctrlr);
    1761           0 :         nvme_ctrlr_unlock(ctrlr);
    1762             : 
    1763           0 :         return rc;
    1764             : }
    1765             : 
    1766             : void
    1767           1 : spdk_nvme_ctrlr_reconnect_async(struct spdk_nvme_ctrlr *ctrlr)
    1768             : {
    1769           1 :         nvme_ctrlr_lock(ctrlr);
    1770             : 
    1771           1 :         ctrlr->prepare_for_reset = false;
    1772             : 
    1773             :         /* Set the state back to INIT to cause a full hardware reset. */
    1774           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, NVME_TIMEOUT_INFINITE);
    1775             : 
    1776             :         /* Return without releasing ctrlr_lock. ctrlr_lock will be released when
    1777             :          * spdk_nvme_ctrlr_reset_poll_async() returns 0.
    1778             :          */
    1779           1 : }
    1780             : 
    1781             : int
    1782           0 : nvme_ctrlr_reinitialize_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair)
    1783             : {
    1784             :         bool async;
    1785             :         int rc;
    1786             : 
    1787           0 :         if (nvme_ctrlr_get_current_process(ctrlr) != qpair->active_proc ||
    1788           0 :             spdk_nvme_ctrlr_is_fabrics(ctrlr) || nvme_qpair_is_admin_queue(qpair)) {
    1789           0 :                 assert(false);
    1790             :                 return -EINVAL;
    1791             :         }
    1792             : 
    1793             :         /* Force a synchronous connect. */
    1794           0 :         async = qpair->async;
    1795           0 :         qpair->async = false;
    1796           0 :         rc = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair);
    1797           0 :         qpair->async = async;
    1798             : 
    1799           0 :         if (rc != 0) {
    1800           0 :                 qpair->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL;
    1801             :         }
    1802             : 
    1803           0 :         return rc;
    1804             : }
    1805             : 
    1806             : /**
    1807             :  * This function will be called when the controller is being reinitialized.
    1808             :  * Note: the ctrlr_lock must be held when calling this function.
    1809             :  */
    1810             : int
    1811          25 : spdk_nvme_ctrlr_reconnect_poll_async(struct spdk_nvme_ctrlr *ctrlr)
    1812             : {
    1813             :         struct spdk_nvme_ns *ns, *tmp_ns;
    1814             :         struct spdk_nvme_qpair  *qpair;
    1815          25 :         int rc = 0, rc_tmp = 0;
    1816             : 
    1817          25 :         if (nvme_ctrlr_process_init(ctrlr) != 0) {
    1818           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "controller reinitialization failed\n");
    1819           0 :                 rc = -1;
    1820             :         }
    1821          25 :         if (ctrlr->state != NVME_CTRLR_STATE_READY && rc != -1) {
    1822          24 :                 return -EAGAIN;
    1823             :         }
    1824             : 
    1825             :         /*
    1826             :          * For non-fabrics controllers, the memory locations of the transport qpair
    1827             :          * don't change when the controller is reset. They simply need to be
    1828             :          * re-enabled with admin commands to the controller. For fabric
    1829             :          * controllers we need to disconnect and reconnect the qpair on its
    1830             :          * own thread outside of the context of the reset.
    1831             :          */
    1832           1 :         if (rc == 0 && !spdk_nvme_ctrlr_is_fabrics(ctrlr)) {
    1833             :                 /* Reinitialize qpairs */
    1834           1 :                 TAILQ_FOREACH(qpair, &ctrlr->active_io_qpairs, tailq) {
    1835             :                         /* Always clear the qid bit here, even for a foreign qpair. We need
    1836             :                          * to make sure another process doesn't get the chance to grab that
    1837             :                          * qid.
    1838             :                          */
    1839           0 :                         assert(spdk_bit_array_get(ctrlr->free_io_qids, qpair->id));
    1840           0 :                         spdk_bit_array_clear(ctrlr->free_io_qids, qpair->id);
    1841           0 :                         if (nvme_ctrlr_get_current_process(ctrlr) != qpair->active_proc) {
    1842             :                                 /*
    1843             :                                  * We cannot reinitialize a foreign qpair. The qpair's owning
    1844             :                                  * process will take care of it. Set failure reason to FAILURE_RESET
    1845             :                                  * to ensure that happens.
    1846             :                                  */
    1847           0 :                                 qpair->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_RESET;
    1848           0 :                                 continue;
    1849             :                         }
    1850           0 :                         rc_tmp = nvme_ctrlr_reinitialize_io_qpair(ctrlr, qpair);
    1851           0 :                         if (rc_tmp != 0) {
    1852           0 :                                 rc = rc_tmp;
    1853             :                         }
    1854             :                 }
    1855             :         }
    1856             : 
    1857             :         /*
    1858             :          * Take this opportunity to remove inactive namespaces. During a reset namespace
    1859             :          * handles can be invalidated.
    1860             :          */
    1861           5 :         RB_FOREACH_SAFE(ns, nvme_ns_tree, &ctrlr->ns, tmp_ns) {
    1862           4 :                 if (!ns->active) {
    1863           1 :                         RB_REMOVE(nvme_ns_tree, &ctrlr->ns, ns);
    1864           1 :                         spdk_free(ns);
    1865             :                 }
    1866             :         }
    1867             : 
    1868           1 :         if (rc) {
    1869           0 :                 nvme_ctrlr_fail(ctrlr, false);
    1870             :         }
    1871           1 :         ctrlr->is_resetting = false;
    1872             : 
    1873           1 :         nvme_ctrlr_unlock(ctrlr);
    1874             : 
    1875           1 :         if (!ctrlr->cdata.oaes.ns_attribute_notices) {
    1876             :                 /*
    1877             :                  * If controller doesn't support ns_attribute_notices and
    1878             :                  * namespace attributes change (e.g. number of namespaces)
    1879             :                  * we need to update system handling device reset.
    1880             :                  */
    1881           1 :                 nvme_io_msg_ctrlr_update(ctrlr);
    1882             :         }
    1883             : 
    1884           1 :         return rc;
    1885             : }
    1886             : 
    1887             : /*
    1888             :  * For PCIe transport, spdk_nvme_ctrlr_disconnect() will do a Controller Level Reset
    1889             :  * (Change CC.EN from 1 to 0) as a operation to disconnect the admin qpair.
    1890             :  * The following two functions are added to do a Controller Level Reset. They have
    1891             :  * to be called under the nvme controller's lock.
    1892             :  */
    1893             : void
    1894           1 : nvme_ctrlr_disable(struct spdk_nvme_ctrlr *ctrlr)
    1895             : {
    1896           1 :         assert(ctrlr->is_disconnecting == true);
    1897             : 
    1898           1 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CHECK_EN, NVME_TIMEOUT_INFINITE);
    1899           1 : }
    1900             : 
    1901             : int
    1902           2 : nvme_ctrlr_disable_poll(struct spdk_nvme_ctrlr *ctrlr)
    1903             : {
    1904           2 :         int rc = 0;
    1905             : 
    1906           2 :         if (nvme_ctrlr_process_init(ctrlr) != 0) {
    1907           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "failed to disable controller\n");
    1908           0 :                 rc = -1;
    1909             :         }
    1910             : 
    1911           2 :         if (ctrlr->state != NVME_CTRLR_STATE_DISABLED && rc != -1) {
    1912           1 :                 return -EAGAIN;
    1913             :         }
    1914             : 
    1915           1 :         return rc;
    1916             : }
    1917             : 
    1918             : static void
    1919           1 : nvme_ctrlr_fail_io_qpairs(struct spdk_nvme_ctrlr *ctrlr)
    1920             : {
    1921             :         struct spdk_nvme_qpair  *qpair;
    1922             : 
    1923           1 :         TAILQ_FOREACH(qpair, &ctrlr->active_io_qpairs, tailq) {
    1924           0 :                 qpair->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL;
    1925             :         }
    1926           1 : }
    1927             : 
    1928             : int
    1929           2 : spdk_nvme_ctrlr_reset(struct spdk_nvme_ctrlr *ctrlr)
    1930             : {
    1931             :         int rc;
    1932             : 
    1933           2 :         nvme_ctrlr_lock(ctrlr);
    1934             : 
    1935           2 :         rc = nvme_ctrlr_disconnect(ctrlr);
    1936           2 :         if (rc == 0) {
    1937           1 :                 nvme_ctrlr_fail_io_qpairs(ctrlr);
    1938             :         }
    1939             : 
    1940           2 :         nvme_ctrlr_unlock(ctrlr);
    1941             : 
    1942           2 :         if (rc != 0) {
    1943           1 :                 if (rc == -EBUSY) {
    1944           1 :                         rc = 0;
    1945             :                 }
    1946           1 :                 return rc;
    1947             :         }
    1948             : 
    1949             :         while (1) {
    1950           1 :                 rc = spdk_nvme_ctrlr_process_admin_completions(ctrlr);
    1951           1 :                 if (rc == -ENXIO) {
    1952           1 :                         break;
    1953             :                 }
    1954             :         }
    1955             : 
    1956           1 :         spdk_nvme_ctrlr_reconnect_async(ctrlr);
    1957             : 
    1958             :         while (true) {
    1959          25 :                 rc = spdk_nvme_ctrlr_reconnect_poll_async(ctrlr);
    1960          25 :                 if (rc != -EAGAIN) {
    1961           1 :                         break;
    1962             :                 }
    1963             :         }
    1964             : 
    1965           1 :         return rc;
    1966             : }
    1967             : 
    1968             : int
    1969           0 : spdk_nvme_ctrlr_reset_subsystem(struct spdk_nvme_ctrlr *ctrlr)
    1970             : {
    1971             :         union spdk_nvme_cap_register cap;
    1972           0 :         int rc = 0;
    1973             : 
    1974           0 :         cap = spdk_nvme_ctrlr_get_regs_cap(ctrlr);
    1975           0 :         if (cap.bits.nssrs == 0) {
    1976           0 :                 NVME_CTRLR_WARNLOG(ctrlr, "subsystem reset is not supported\n");
    1977           0 :                 return -ENOTSUP;
    1978             :         }
    1979             : 
    1980           0 :         NVME_CTRLR_NOTICELOG(ctrlr, "resetting subsystem\n");
    1981           0 :         nvme_ctrlr_lock(ctrlr);
    1982           0 :         ctrlr->is_resetting = true;
    1983           0 :         rc = nvme_ctrlr_set_nssr(ctrlr, SPDK_NVME_NSSR_VALUE);
    1984           0 :         ctrlr->is_resetting = false;
    1985             : 
    1986           0 :         nvme_ctrlr_unlock(ctrlr);
    1987             :         /*
    1988             :          * No more cleanup at this point like in the ctrlr reset. A subsystem reset will cause
    1989             :          * a hot remove for PCIe transport. The hot remove handling does all the necessary ctrlr cleanup.
    1990             :          */
    1991           0 :         return rc;
    1992             : }
    1993             : 
    1994             : int
    1995           4 : spdk_nvme_ctrlr_set_trid(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_transport_id *trid)
    1996             : {
    1997           4 :         int rc = 0;
    1998             : 
    1999           4 :         nvme_ctrlr_lock(ctrlr);
    2000             : 
    2001           4 :         if (ctrlr->is_failed == false) {
    2002           1 :                 rc = -EPERM;
    2003           1 :                 goto out;
    2004             :         }
    2005             : 
    2006           3 :         if (trid->trtype != ctrlr->trid.trtype) {
    2007           1 :                 rc = -EINVAL;
    2008           1 :                 goto out;
    2009             :         }
    2010             : 
    2011           2 :         if (strncmp(trid->subnqn, ctrlr->trid.subnqn, SPDK_NVMF_NQN_MAX_LEN)) {
    2012           1 :                 rc = -EINVAL;
    2013           1 :                 goto out;
    2014             :         }
    2015             : 
    2016           1 :         ctrlr->trid = *trid;
    2017             : 
    2018           4 : out:
    2019           4 :         nvme_ctrlr_unlock(ctrlr);
    2020           4 :         return rc;
    2021             : }
    2022             : 
    2023             : void
    2024           0 : spdk_nvme_ctrlr_set_remove_cb(struct spdk_nvme_ctrlr *ctrlr,
    2025             :                               spdk_nvme_remove_cb remove_cb, void *remove_ctx)
    2026             : {
    2027           0 :         if (!spdk_process_is_primary()) {
    2028           0 :                 return;
    2029             :         }
    2030             : 
    2031           0 :         nvme_ctrlr_lock(ctrlr);
    2032           0 :         ctrlr->remove_cb = remove_cb;
    2033           0 :         ctrlr->cb_ctx = remove_ctx;
    2034           0 :         nvme_ctrlr_unlock(ctrlr);
    2035             : }
    2036             : 
    2037             : static void
    2038          16 : nvme_ctrlr_identify_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2039             : {
    2040          16 :         struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg;
    2041             : 
    2042          16 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2043           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "nvme_identify_controller failed!\n");
    2044           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2045           0 :                 return;
    2046             :         }
    2047             : 
    2048             :         /*
    2049             :          * Use MDTS to ensure our default max_xfer_size doesn't exceed what the
    2050             :          *  controller supports.
    2051             :          */
    2052          16 :         ctrlr->max_xfer_size = nvme_transport_ctrlr_get_max_xfer_size(ctrlr);
    2053          16 :         NVME_CTRLR_DEBUGLOG(ctrlr, "transport max_xfer_size %u\n", ctrlr->max_xfer_size);
    2054          16 :         if (ctrlr->cdata.mdts > 0) {
    2055           0 :                 ctrlr->max_xfer_size = spdk_min(ctrlr->max_xfer_size,
    2056             :                                                 ctrlr->min_page_size * (1 << ctrlr->cdata.mdts));
    2057           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "MDTS max_xfer_size %u\n", ctrlr->max_xfer_size);
    2058             :         }
    2059             : 
    2060          16 :         NVME_CTRLR_DEBUGLOG(ctrlr, "CNTLID 0x%04" PRIx16 "\n", ctrlr->cdata.cntlid);
    2061          16 :         if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) {
    2062           1 :                 ctrlr->cntlid = ctrlr->cdata.cntlid;
    2063             :         } else {
    2064             :                 /*
    2065             :                  * Fabrics controllers should already have CNTLID from the Connect command.
    2066             :                  *
    2067             :                  * If CNTLID from Connect doesn't match CNTLID in the Identify Controller data,
    2068             :                  * trust the one from Connect.
    2069             :                  */
    2070          15 :                 if (ctrlr->cntlid != ctrlr->cdata.cntlid) {
    2071           0 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Identify CNTLID 0x%04" PRIx16 " != Connect CNTLID 0x%04" PRIx16 "\n",
    2072             :                                             ctrlr->cdata.cntlid, ctrlr->cntlid);
    2073             :                 }
    2074             :         }
    2075             : 
    2076          16 :         if (ctrlr->cdata.sgls.supported && !(ctrlr->quirks & NVME_QUIRK_NOT_USE_SGL)) {
    2077           0 :                 assert(ctrlr->cdata.sgls.supported != 0x3);
    2078           0 :                 ctrlr->flags |= SPDK_NVME_CTRLR_SGL_SUPPORTED;
    2079           0 :                 if (ctrlr->cdata.sgls.supported == 0x2) {
    2080           0 :                         ctrlr->flags |= SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT;
    2081             :                 }
    2082             : 
    2083           0 :                 ctrlr->max_sges = nvme_transport_ctrlr_get_max_sges(ctrlr);
    2084           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "transport max_sges %u\n", ctrlr->max_sges);
    2085             :         }
    2086             : 
    2087          16 :         if (ctrlr->cdata.sgls.metadata_address && !(ctrlr->quirks & NVME_QUIRK_NOT_USE_SGL)) {
    2088           0 :                 ctrlr->flags |= SPDK_NVME_CTRLR_MPTR_SGL_SUPPORTED;
    2089             :         }
    2090             : 
    2091          16 :         if (ctrlr->cdata.oacs.security && !(ctrlr->quirks & NVME_QUIRK_OACS_SECURITY)) {
    2092           0 :                 ctrlr->flags |= SPDK_NVME_CTRLR_SECURITY_SEND_RECV_SUPPORTED;
    2093             :         }
    2094             : 
    2095          16 :         if (ctrlr->cdata.oacs.directives) {
    2096           0 :                 ctrlr->flags |= SPDK_NVME_CTRLR_DIRECTIVES_SUPPORTED;
    2097             :         }
    2098             : 
    2099          16 :         NVME_CTRLR_DEBUGLOG(ctrlr, "fuses compare and write: %d\n",
    2100             :                             ctrlr->cdata.fuses.compare_and_write);
    2101          16 :         if (ctrlr->cdata.fuses.compare_and_write) {
    2102           0 :                 ctrlr->flags |= SPDK_NVME_CTRLR_COMPARE_AND_WRITE_SUPPORTED;
    2103             :         }
    2104             : 
    2105          16 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER,
    2106          16 :                              ctrlr->opts.admin_timeout_ms);
    2107             : }
    2108             : 
    2109             : static int
    2110          16 : nvme_ctrlr_identify(struct spdk_nvme_ctrlr *ctrlr)
    2111             : {
    2112             :         int     rc;
    2113             : 
    2114          16 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY,
    2115          16 :                              ctrlr->opts.admin_timeout_ms);
    2116             : 
    2117          16 :         rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_CTRLR, 0, 0, 0,
    2118          16 :                                      &ctrlr->cdata, sizeof(ctrlr->cdata),
    2119             :                                      nvme_ctrlr_identify_done, ctrlr);
    2120          16 :         if (rc != 0) {
    2121           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2122           0 :                 return rc;
    2123             :         }
    2124             : 
    2125          16 :         return 0;
    2126             : }
    2127             : 
    2128             : static void
    2129           0 : nvme_ctrlr_get_zns_cmd_and_effects_log_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2130             : {
    2131             :         struct spdk_nvme_cmds_and_effect_log_page *log_page;
    2132           0 :         struct spdk_nvme_ctrlr *ctrlr = arg;
    2133             : 
    2134           0 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2135           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "nvme_ctrlr_get_zns_cmd_and_effects_log failed!\n");
    2136           0 :                 spdk_free(ctrlr->tmp_ptr);
    2137           0 :                 ctrlr->tmp_ptr = NULL;
    2138           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2139           0 :                 return;
    2140             :         }
    2141             : 
    2142           0 :         log_page = ctrlr->tmp_ptr;
    2143             : 
    2144           0 :         if (log_page->io_cmds_supported[SPDK_NVME_OPC_ZONE_APPEND].csupp) {
    2145           0 :                 ctrlr->flags |= SPDK_NVME_CTRLR_ZONE_APPEND_SUPPORTED;
    2146             :         }
    2147           0 :         spdk_free(ctrlr->tmp_ptr);
    2148           0 :         ctrlr->tmp_ptr = NULL;
    2149             : 
    2150           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_NUM_QUEUES, ctrlr->opts.admin_timeout_ms);
    2151             : }
    2152             : 
    2153             : static int
    2154           0 : nvme_ctrlr_get_zns_cmd_and_effects_log(struct spdk_nvme_ctrlr *ctrlr)
    2155             : {
    2156             :         int rc;
    2157             : 
    2158           0 :         assert(!ctrlr->tmp_ptr);
    2159           0 :         ctrlr->tmp_ptr = spdk_zmalloc(sizeof(struct spdk_nvme_cmds_and_effect_log_page), 64, NULL,
    2160             :                                       SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE | SPDK_MALLOC_DMA);
    2161           0 :         if (!ctrlr->tmp_ptr) {
    2162           0 :                 rc = -ENOMEM;
    2163           0 :                 goto error;
    2164             :         }
    2165             : 
    2166           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_GET_ZNS_CMD_EFFECTS_LOG,
    2167           0 :                              ctrlr->opts.admin_timeout_ms);
    2168             : 
    2169           0 :         rc = spdk_nvme_ctrlr_cmd_get_log_page_ext(ctrlr, SPDK_NVME_LOG_COMMAND_EFFECTS_LOG,
    2170             :                         0, ctrlr->tmp_ptr, sizeof(struct spdk_nvme_cmds_and_effect_log_page),
    2171             :                         0, 0, 0, SPDK_NVME_CSI_ZNS << 24,
    2172             :                         nvme_ctrlr_get_zns_cmd_and_effects_log_done, ctrlr);
    2173           0 :         if (rc != 0) {
    2174           0 :                 goto error;
    2175             :         }
    2176             : 
    2177           0 :         return 0;
    2178             : 
    2179           0 : error:
    2180           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2181           0 :         spdk_free(ctrlr->tmp_ptr);
    2182           0 :         ctrlr->tmp_ptr = NULL;
    2183           0 :         return rc;
    2184             : }
    2185             : 
    2186             : static void
    2187           0 : nvme_ctrlr_identify_zns_specific_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2188             : {
    2189           0 :         struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg;
    2190             : 
    2191           0 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2192             :                 /* no need to print an error, the controller simply does not support ZNS */
    2193           0 :                 nvme_ctrlr_free_zns_specific_data(ctrlr);
    2194           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_NUM_QUEUES,
    2195           0 :                                      ctrlr->opts.admin_timeout_ms);
    2196           0 :                 return;
    2197             :         }
    2198             : 
    2199             :         /* A zero zasl value means use mdts */
    2200           0 :         if (ctrlr->cdata_zns->zasl) {
    2201           0 :                 uint32_t max_append = ctrlr->min_page_size * (1 << ctrlr->cdata_zns->zasl);
    2202           0 :                 ctrlr->max_zone_append_size = spdk_min(ctrlr->max_xfer_size, max_append);
    2203             :         } else {
    2204           0 :                 ctrlr->max_zone_append_size = ctrlr->max_xfer_size;
    2205             :         }
    2206             : 
    2207           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_GET_ZNS_CMD_EFFECTS_LOG,
    2208           0 :                              ctrlr->opts.admin_timeout_ms);
    2209             : }
    2210             : 
    2211             : /**
    2212             :  * This function will try to fetch the I/O Command Specific Controller data structure for
    2213             :  * each I/O Command Set supported by SPDK.
    2214             :  *
    2215             :  * If an I/O Command Set is not supported by the controller, "Invalid Field in Command"
    2216             :  * will be returned. Since we are fetching in a exploratively way, getting an error back
    2217             :  * from the controller should not be treated as fatal.
    2218             :  *
    2219             :  * I/O Command Sets not supported by SPDK will be skipped (e.g. Key Value Command Set).
    2220             :  *
    2221             :  * I/O Command Sets without a IOCS specific data structure (i.e. a zero-filled IOCS specific
    2222             :  * data structure) will be skipped (e.g. NVM Command Set, Key Value Command Set).
    2223             :  */
    2224             : static int
    2225          19 : nvme_ctrlr_identify_iocs_specific(struct spdk_nvme_ctrlr *ctrlr)
    2226             : {
    2227             :         int     rc;
    2228             : 
    2229          19 :         if (!nvme_ctrlr_multi_iocs_enabled(ctrlr)) {
    2230          19 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_NUM_QUEUES,
    2231          19 :                                      ctrlr->opts.admin_timeout_ms);
    2232          19 :                 return 0;
    2233             :         }
    2234             : 
    2235             :         /*
    2236             :          * Since SPDK currently only needs to fetch a single Command Set, keep the code here,
    2237             :          * instead of creating multiple NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC substates,
    2238             :          * which would require additional functions and complexity for no good reason.
    2239             :          */
    2240           0 :         assert(!ctrlr->cdata_zns);
    2241           0 :         ctrlr->cdata_zns = spdk_zmalloc(sizeof(*ctrlr->cdata_zns), 64, NULL, SPDK_ENV_SOCKET_ID_ANY,
    2242             :                                         SPDK_MALLOC_SHARE | SPDK_MALLOC_DMA);
    2243           0 :         if (!ctrlr->cdata_zns) {
    2244           0 :                 rc = -ENOMEM;
    2245           0 :                 goto error;
    2246             :         }
    2247             : 
    2248           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_IOCS_SPECIFIC,
    2249           0 :                              ctrlr->opts.admin_timeout_ms);
    2250             : 
    2251           0 :         rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_CTRLR_IOCS, 0, 0, SPDK_NVME_CSI_ZNS,
    2252           0 :                                      ctrlr->cdata_zns, sizeof(*ctrlr->cdata_zns),
    2253             :                                      nvme_ctrlr_identify_zns_specific_done, ctrlr);
    2254           0 :         if (rc != 0) {
    2255           0 :                 goto error;
    2256             :         }
    2257             : 
    2258           0 :         return 0;
    2259             : 
    2260           0 : error:
    2261           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2262           0 :         nvme_ctrlr_free_zns_specific_data(ctrlr);
    2263           0 :         return rc;
    2264             : }
    2265             : 
    2266             : enum nvme_active_ns_state {
    2267             :         NVME_ACTIVE_NS_STATE_IDLE,
    2268             :         NVME_ACTIVE_NS_STATE_PROCESSING,
    2269             :         NVME_ACTIVE_NS_STATE_DONE,
    2270             :         NVME_ACTIVE_NS_STATE_ERROR
    2271             : };
    2272             : 
    2273             : typedef void (*nvme_active_ns_ctx_deleter)(struct nvme_active_ns_ctx *);
    2274             : 
    2275             : struct nvme_active_ns_ctx {
    2276             :         struct spdk_nvme_ctrlr *ctrlr;
    2277             :         uint32_t page_count;
    2278             :         uint32_t next_nsid;
    2279             :         uint32_t *new_ns_list;
    2280             :         nvme_active_ns_ctx_deleter deleter;
    2281             : 
    2282             :         enum nvme_active_ns_state state;
    2283             : };
    2284             : 
    2285             : static struct nvme_active_ns_ctx *
    2286          45 : nvme_active_ns_ctx_create(struct spdk_nvme_ctrlr *ctrlr, nvme_active_ns_ctx_deleter deleter)
    2287             : {
    2288             :         struct nvme_active_ns_ctx *ctx;
    2289          45 :         uint32_t *new_ns_list = NULL;
    2290             : 
    2291          45 :         ctx = calloc(1, sizeof(*ctx));
    2292          45 :         if (!ctx) {
    2293           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate nvme_active_ns_ctx!\n");
    2294           0 :                 return NULL;
    2295             :         }
    2296             : 
    2297          45 :         new_ns_list = spdk_zmalloc(sizeof(struct spdk_nvme_ns_list), ctrlr->page_size,
    2298             :                                    NULL, SPDK_ENV_LCORE_ID_ANY, SPDK_MALLOC_SHARE);
    2299          45 :         if (!new_ns_list) {
    2300           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate active_ns_list!\n");
    2301           0 :                 free(ctx);
    2302           0 :                 return NULL;
    2303             :         }
    2304             : 
    2305          45 :         ctx->page_count = 1;
    2306          45 :         ctx->new_ns_list = new_ns_list;
    2307          45 :         ctx->ctrlr = ctrlr;
    2308          45 :         ctx->deleter = deleter;
    2309             : 
    2310          45 :         return ctx;
    2311             : }
    2312             : 
    2313             : static void
    2314          45 : nvme_active_ns_ctx_destroy(struct nvme_active_ns_ctx *ctx)
    2315             : {
    2316          45 :         spdk_free(ctx->new_ns_list);
    2317          45 :         free(ctx);
    2318          45 : }
    2319             : 
    2320             : static int
    2321       18403 : nvme_ctrlr_destruct_namespace(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid)
    2322             : {
    2323       18403 :         struct spdk_nvme_ns tmp, *ns;
    2324             : 
    2325       18403 :         assert(ctrlr != NULL);
    2326             : 
    2327       18403 :         tmp.id = nsid;
    2328       18403 :         ns = RB_FIND(nvme_ns_tree, &ctrlr->ns, &tmp);
    2329       18403 :         if (ns == NULL) {
    2330           0 :                 return -EINVAL;
    2331             :         }
    2332             : 
    2333       18403 :         nvme_ns_destruct(ns);
    2334       18403 :         ns->active = false;
    2335             : 
    2336       18403 :         return 0;
    2337             : }
    2338             : 
    2339             : static int
    2340       12311 : nvme_ctrlr_construct_namespace(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid)
    2341             : {
    2342             :         struct spdk_nvme_ns *ns;
    2343             : 
    2344       12311 :         if (nsid < 1 || nsid > ctrlr->cdata.nn) {
    2345           0 :                 return -EINVAL;
    2346             :         }
    2347             : 
    2348             :         /* Namespaces are constructed on demand, so simply request it. */
    2349       12311 :         ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
    2350       12311 :         if (ns == NULL) {
    2351           0 :                 return -ENOMEM;
    2352             :         }
    2353             : 
    2354       12311 :         ns->active = true;
    2355             : 
    2356       12311 :         return 0;
    2357             : }
    2358             : 
    2359             : static void
    2360          44 : nvme_ctrlr_identify_active_ns_swap(struct spdk_nvme_ctrlr *ctrlr, uint32_t *new_ns_list,
    2361             :                                    size_t max_entries)
    2362             : {
    2363          44 :         uint32_t active_ns_count = 0;
    2364             :         size_t i;
    2365             :         uint32_t nsid;
    2366             :         struct spdk_nvme_ns *ns, *tmp_ns;
    2367             :         int rc;
    2368             : 
    2369             :         /* First, remove namespaces that no longer exist */
    2370       15387 :         RB_FOREACH_SAFE(ns, nvme_ns_tree, &ctrlr->ns, tmp_ns) {
    2371       15343 :                 nsid = new_ns_list[0];
    2372       15343 :                 active_ns_count = 0;
    2373     3547429 :                 while (nsid != 0) {
    2374     3536712 :                         if (nsid == ns->id) {
    2375        4626 :                                 break;
    2376             :                         }
    2377             : 
    2378     3532086 :                         nsid = new_ns_list[active_ns_count++];
    2379             :                 }
    2380             : 
    2381       15343 :                 if (nsid != ns->id) {
    2382             :                         /* Did not find this namespace id in the new list. */
    2383       10717 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Namespace %u was removed\n", ns->id);
    2384       10717 :                         nvme_ctrlr_destruct_namespace(ctrlr, ns->id);
    2385             :                 }
    2386             :         }
    2387             : 
    2388             :         /* Next, add new namespaces */
    2389          44 :         active_ns_count = 0;
    2390       12355 :         for (i = 0; i < max_entries; i++) {
    2391       12355 :                 nsid = new_ns_list[active_ns_count];
    2392             : 
    2393       12355 :                 if (nsid == 0) {
    2394          44 :                         break;
    2395             :                 }
    2396             : 
    2397             :                 /* If the namespace already exists, this will not construct it a second time. */
    2398       12311 :                 rc = nvme_ctrlr_construct_namespace(ctrlr, nsid);
    2399       12311 :                 if (rc != 0) {
    2400             :                         /* We can't easily handle a failure here. But just move on. */
    2401           0 :                         assert(false);
    2402             :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Failed to allocate a namespace object.\n");
    2403             :                         continue;
    2404             :                 }
    2405             : 
    2406       12311 :                 active_ns_count++;
    2407             :         }
    2408             : 
    2409          44 :         ctrlr->active_ns_count = active_ns_count;
    2410          44 : }
    2411             : 
    2412             : static void
    2413          30 : nvme_ctrlr_identify_active_ns_async_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2414             : {
    2415          30 :         struct nvme_active_ns_ctx *ctx = arg;
    2416          30 :         uint32_t *new_ns_list = NULL;
    2417             : 
    2418          30 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2419           1 :                 ctx->state = NVME_ACTIVE_NS_STATE_ERROR;
    2420           1 :                 goto out;
    2421             :         }
    2422             : 
    2423          29 :         ctx->next_nsid = ctx->new_ns_list[1024 * ctx->page_count - 1];
    2424          29 :         if (ctx->next_nsid == 0) {
    2425          24 :                 ctx->state = NVME_ACTIVE_NS_STATE_DONE;
    2426          24 :                 goto out;
    2427             :         }
    2428             : 
    2429           5 :         ctx->page_count++;
    2430           5 :         new_ns_list = spdk_realloc(ctx->new_ns_list,
    2431           5 :                                    ctx->page_count * sizeof(struct spdk_nvme_ns_list),
    2432           5 :                                    ctx->ctrlr->page_size);
    2433           5 :         if (!new_ns_list) {
    2434           0 :                 SPDK_ERRLOG("Failed to reallocate active_ns_list!\n");
    2435           0 :                 ctx->state = NVME_ACTIVE_NS_STATE_ERROR;
    2436           0 :                 goto out;
    2437             :         }
    2438             : 
    2439           5 :         ctx->new_ns_list = new_ns_list;
    2440           5 :         nvme_ctrlr_identify_active_ns_async(ctx);
    2441           5 :         return;
    2442             : 
    2443          25 : out:
    2444          25 :         if (ctx->deleter) {
    2445           9 :                 ctx->deleter(ctx);
    2446             :         }
    2447             : }
    2448             : 
    2449             : static void
    2450          50 : nvme_ctrlr_identify_active_ns_async(struct nvme_active_ns_ctx *ctx)
    2451             : {
    2452          50 :         struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr;
    2453             :         uint32_t i;
    2454             :         int rc;
    2455             : 
    2456          50 :         if (ctrlr->cdata.nn == 0) {
    2457          16 :                 ctx->state = NVME_ACTIVE_NS_STATE_DONE;
    2458          16 :                 goto out;
    2459             :         }
    2460             : 
    2461          34 :         assert(ctx->new_ns_list != NULL);
    2462             : 
    2463             :         /*
    2464             :          * If controller doesn't support active ns list CNS 0x02 dummy up
    2465             :          * an active ns list, i.e. all namespaces report as active
    2466             :          */
    2467          34 :         if (ctrlr->vs.raw < SPDK_NVME_VERSION(1, 1, 0) || ctrlr->quirks & NVME_QUIRK_IDENTIFY_CNS) {
    2468             :                 uint32_t *new_ns_list;
    2469             : 
    2470             :                 /*
    2471             :                  * Active NS list must always end with zero element.
    2472             :                  * So, we allocate for cdata.nn+1.
    2473             :                  */
    2474           4 :                 ctx->page_count = spdk_divide_round_up(ctrlr->cdata.nn + 1,
    2475             :                                                        sizeof(struct spdk_nvme_ns_list) / sizeof(new_ns_list[0]));
    2476           4 :                 new_ns_list = spdk_realloc(ctx->new_ns_list,
    2477           4 :                                            ctx->page_count * sizeof(struct spdk_nvme_ns_list),
    2478           4 :                                            ctx->ctrlr->page_size);
    2479           4 :                 if (!new_ns_list) {
    2480           0 :                         SPDK_ERRLOG("Failed to reallocate active_ns_list!\n");
    2481           0 :                         ctx->state = NVME_ACTIVE_NS_STATE_ERROR;
    2482           0 :                         goto out;
    2483             :                 }
    2484             : 
    2485           4 :                 ctx->new_ns_list = new_ns_list;
    2486           4 :                 ctx->new_ns_list[ctrlr->cdata.nn] = 0;
    2487        4091 :                 for (i = 0; i < ctrlr->cdata.nn; i++) {
    2488        4087 :                         ctx->new_ns_list[i] = i + 1;
    2489             :                 }
    2490             : 
    2491           4 :                 ctx->state = NVME_ACTIVE_NS_STATE_DONE;
    2492           4 :                 goto out;
    2493             :         }
    2494             : 
    2495          30 :         ctx->state = NVME_ACTIVE_NS_STATE_PROCESSING;
    2496          30 :         rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_ACTIVE_NS_LIST, 0, ctx->next_nsid, 0,
    2497          30 :                                      &ctx->new_ns_list[1024 * (ctx->page_count - 1)], sizeof(struct spdk_nvme_ns_list),
    2498             :                                      nvme_ctrlr_identify_active_ns_async_done, ctx);
    2499          30 :         if (rc != 0) {
    2500           0 :                 ctx->state = NVME_ACTIVE_NS_STATE_ERROR;
    2501           0 :                 goto out;
    2502             :         }
    2503             : 
    2504          30 :         return;
    2505             : 
    2506          20 : out:
    2507          20 :         if (ctx->deleter) {
    2508          15 :                 ctx->deleter(ctx);
    2509             :         }
    2510             : }
    2511             : 
    2512             : static void
    2513          24 : _nvme_active_ns_ctx_deleter(struct nvme_active_ns_ctx *ctx)
    2514             : {
    2515          24 :         struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr;
    2516             :         struct spdk_nvme_ns *ns;
    2517             : 
    2518          24 :         if (ctx->state == NVME_ACTIVE_NS_STATE_ERROR) {
    2519           0 :                 nvme_active_ns_ctx_destroy(ctx);
    2520           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2521           0 :                 return;
    2522             :         }
    2523             : 
    2524          24 :         assert(ctx->state == NVME_ACTIVE_NS_STATE_DONE);
    2525             : 
    2526          28 :         RB_FOREACH(ns, nvme_ns_tree, &ctrlr->ns) {
    2527           4 :                 nvme_ns_free_iocs_specific_data(ns);
    2528             :         }
    2529             : 
    2530          24 :         nvme_ctrlr_identify_active_ns_swap(ctrlr, ctx->new_ns_list, ctx->page_count * 1024);
    2531          24 :         nvme_active_ns_ctx_destroy(ctx);
    2532          24 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_NS, ctrlr->opts.admin_timeout_ms);
    2533             : }
    2534             : 
    2535             : static void
    2536          24 : _nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr)
    2537             : {
    2538             :         struct nvme_active_ns_ctx *ctx;
    2539             : 
    2540          24 :         ctx = nvme_active_ns_ctx_create(ctrlr, _nvme_active_ns_ctx_deleter);
    2541          24 :         if (!ctx) {
    2542           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2543           0 :                 return;
    2544             :         }
    2545             : 
    2546          24 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS,
    2547          24 :                              ctrlr->opts.admin_timeout_ms);
    2548          24 :         nvme_ctrlr_identify_active_ns_async(ctx);
    2549             : }
    2550             : 
    2551             : int
    2552          21 : nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr)
    2553             : {
    2554             :         struct nvme_active_ns_ctx *ctx;
    2555             :         int rc;
    2556             : 
    2557          21 :         ctx = nvme_active_ns_ctx_create(ctrlr, NULL);
    2558          21 :         if (!ctx) {
    2559           0 :                 return -ENOMEM;
    2560             :         }
    2561             : 
    2562          21 :         nvme_ctrlr_identify_active_ns_async(ctx);
    2563          21 :         while (ctx->state == NVME_ACTIVE_NS_STATE_PROCESSING) {
    2564           0 :                 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
    2565           0 :                 if (rc < 0) {
    2566           0 :                         ctx->state = NVME_ACTIVE_NS_STATE_ERROR;
    2567           0 :                         break;
    2568             :                 }
    2569             :         }
    2570             : 
    2571          21 :         if (ctx->state == NVME_ACTIVE_NS_STATE_ERROR) {
    2572           1 :                 nvme_active_ns_ctx_destroy(ctx);
    2573           1 :                 return -ENXIO;
    2574             :         }
    2575             : 
    2576          20 :         assert(ctx->state == NVME_ACTIVE_NS_STATE_DONE);
    2577          20 :         nvme_ctrlr_identify_active_ns_swap(ctrlr, ctx->new_ns_list, ctx->page_count * 1024);
    2578          20 :         nvme_active_ns_ctx_destroy(ctx);
    2579             : 
    2580          20 :         return 0;
    2581             : }
    2582             : 
    2583             : static void
    2584          21 : nvme_ctrlr_identify_ns_async_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2585             : {
    2586          21 :         struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg;
    2587          21 :         struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr;
    2588             :         uint32_t nsid;
    2589             :         int rc;
    2590             : 
    2591          21 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2592           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2593           0 :                 return;
    2594             :         }
    2595             : 
    2596          21 :         nvme_ns_set_identify_data(ns);
    2597             : 
    2598             :         /* move on to the next active NS */
    2599          21 :         nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id);
    2600          21 :         ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
    2601          21 :         if (ns == NULL) {
    2602           6 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_ID_DESCS,
    2603           6 :                                      ctrlr->opts.admin_timeout_ms);
    2604           6 :                 return;
    2605             :         }
    2606          15 :         ns->ctrlr = ctrlr;
    2607          15 :         ns->id = nsid;
    2608             : 
    2609          15 :         rc = nvme_ctrlr_identify_ns_async(ns);
    2610          15 :         if (rc) {
    2611           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2612             :         }
    2613             : }
    2614             : 
    2615             : static int
    2616          21 : nvme_ctrlr_identify_ns_async(struct spdk_nvme_ns *ns)
    2617             : {
    2618          21 :         struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr;
    2619             :         struct spdk_nvme_ns_data *nsdata;
    2620             : 
    2621          21 :         nsdata = &ns->nsdata;
    2622             : 
    2623          21 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS,
    2624          21 :                              ctrlr->opts.admin_timeout_ms);
    2625          21 :         return nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS, 0, ns->id, 0,
    2626             :                                        nsdata, sizeof(*nsdata),
    2627             :                                        nvme_ctrlr_identify_ns_async_done, ns);
    2628             : }
    2629             : 
    2630             : static int
    2631          14 : nvme_ctrlr_identify_namespaces(struct spdk_nvme_ctrlr *ctrlr)
    2632             : {
    2633             :         uint32_t nsid;
    2634             :         struct spdk_nvme_ns *ns;
    2635             :         int rc;
    2636             : 
    2637          14 :         nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr);
    2638          14 :         ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
    2639          14 :         if (ns == NULL) {
    2640             :                 /* No active NS, move on to the next state */
    2641           8 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_ID_DESCS,
    2642           8 :                                      ctrlr->opts.admin_timeout_ms);
    2643           8 :                 return 0;
    2644             :         }
    2645             : 
    2646           6 :         ns->ctrlr = ctrlr;
    2647           6 :         ns->id = nsid;
    2648             : 
    2649           6 :         rc = nvme_ctrlr_identify_ns_async(ns);
    2650           6 :         if (rc) {
    2651           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2652             :         }
    2653             : 
    2654           6 :         return rc;
    2655             : }
    2656             : 
    2657             : static int
    2658           4 : nvme_ctrlr_identify_namespaces_iocs_specific_next(struct spdk_nvme_ctrlr *ctrlr, uint32_t prev_nsid)
    2659             : {
    2660             :         uint32_t nsid;
    2661             :         struct spdk_nvme_ns *ns;
    2662             :         int rc;
    2663             : 
    2664           4 :         if (!prev_nsid) {
    2665           2 :                 nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr);
    2666             :         } else {
    2667             :                 /* move on to the next active NS */
    2668           2 :                 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, prev_nsid);
    2669             :         }
    2670             : 
    2671           4 :         ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
    2672           4 :         if (ns == NULL) {
    2673             :                 /* No first/next active NS, move on to the next state */
    2674           1 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES,
    2675           1 :                                      ctrlr->opts.admin_timeout_ms);
    2676           1 :                 return 0;
    2677             :         }
    2678             : 
    2679             :         /* loop until we find a ns which has (supported) iocs specific data */
    2680          10 :         while (!nvme_ns_has_supported_iocs_specific_data(ns)) {
    2681           8 :                 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id);
    2682           8 :                 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
    2683           8 :                 if (ns == NULL) {
    2684             :                         /* no namespace with (supported) iocs specific data found */
    2685           1 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES,
    2686           1 :                                              ctrlr->opts.admin_timeout_ms);
    2687           1 :                         return 0;
    2688             :                 }
    2689             :         }
    2690             : 
    2691           2 :         rc = nvme_ctrlr_identify_ns_iocs_specific_async(ns);
    2692           2 :         if (rc) {
    2693           1 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2694             :         }
    2695             : 
    2696           2 :         return rc;
    2697             : }
    2698             : 
    2699             : static void
    2700           0 : nvme_ctrlr_identify_ns_zns_specific_async_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2701             : {
    2702           0 :         struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg;
    2703           0 :         struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr;
    2704             : 
    2705           0 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2706           0 :                 nvme_ns_free_zns_specific_data(ns);
    2707           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2708           0 :                 return;
    2709             :         }
    2710             : 
    2711           0 :         nvme_ctrlr_identify_namespaces_iocs_specific_next(ctrlr, ns->id);
    2712             : }
    2713             : 
    2714             : static int
    2715           2 : nvme_ctrlr_identify_ns_zns_specific_async(struct spdk_nvme_ns *ns)
    2716             : {
    2717           2 :         struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr;
    2718             :         int rc;
    2719             : 
    2720           2 :         assert(!ns->nsdata_zns);
    2721           2 :         ns->nsdata_zns = spdk_zmalloc(sizeof(*ns->nsdata_zns), 64, NULL, SPDK_ENV_SOCKET_ID_ANY,
    2722             :                                       SPDK_MALLOC_SHARE);
    2723           2 :         if (!ns->nsdata_zns) {
    2724           0 :                 return -ENOMEM;
    2725             :         }
    2726             : 
    2727           2 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS_IOCS_SPECIFIC,
    2728           2 :                              ctrlr->opts.admin_timeout_ms);
    2729           2 :         rc = nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS_IOCS, 0, ns->id, ns->csi,
    2730           2 :                                      ns->nsdata_zns, sizeof(*ns->nsdata_zns),
    2731             :                                      nvme_ctrlr_identify_ns_zns_specific_async_done, ns);
    2732           2 :         if (rc) {
    2733           1 :                 nvme_ns_free_zns_specific_data(ns);
    2734             :         }
    2735             : 
    2736           2 :         return rc;
    2737             : }
    2738             : 
    2739             : static void
    2740           0 : nvme_ctrlr_identify_ns_nvm_specific_async_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2741             : {
    2742           0 :         struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg;
    2743           0 :         struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr;
    2744             : 
    2745           0 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2746           0 :                 nvme_ns_free_nvm_specific_data(ns);
    2747           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2748           0 :                 return;
    2749             :         }
    2750             : 
    2751           0 :         nvme_ctrlr_identify_namespaces_iocs_specific_next(ctrlr, ns->id);
    2752             : }
    2753             : 
    2754             : static int
    2755           0 : nvme_ctrlr_identify_ns_nvm_specific_async(struct spdk_nvme_ns *ns)
    2756             : {
    2757           0 :         struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr;
    2758             :         int rc;
    2759             : 
    2760           0 :         assert(!ns->nsdata_nvm);
    2761           0 :         ns->nsdata_nvm = spdk_zmalloc(sizeof(*ns->nsdata_nvm), 64, NULL, SPDK_ENV_SOCKET_ID_ANY,
    2762             :                                       SPDK_MALLOC_SHARE);
    2763           0 :         if (!ns->nsdata_nvm) {
    2764           0 :                 return -ENOMEM;
    2765             :         }
    2766             : 
    2767           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS_IOCS_SPECIFIC,
    2768           0 :                              ctrlr->opts.admin_timeout_ms);
    2769           0 :         rc = nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS_IOCS, 0, ns->id, ns->csi,
    2770           0 :                                      ns->nsdata_nvm, sizeof(*ns->nsdata_nvm),
    2771             :                                      nvme_ctrlr_identify_ns_nvm_specific_async_done, ns);
    2772           0 :         if (rc) {
    2773           0 :                 nvme_ns_free_nvm_specific_data(ns);
    2774             :         }
    2775             : 
    2776           0 :         return rc;
    2777             : }
    2778             : 
    2779             : static int
    2780           2 : nvme_ctrlr_identify_ns_iocs_specific_async(struct spdk_nvme_ns *ns)
    2781             : {
    2782           2 :         switch (ns->csi) {
    2783           2 :         case SPDK_NVME_CSI_ZNS:
    2784           2 :                 return nvme_ctrlr_identify_ns_zns_specific_async(ns);
    2785           0 :         case SPDK_NVME_CSI_NVM:
    2786           0 :                 if (ns->ctrlr->cdata.ctratt.bits.elbas) {
    2787           0 :                         return nvme_ctrlr_identify_ns_nvm_specific_async(ns);
    2788             :                 }
    2789             :         /* fallthrough */
    2790             :         default:
    2791             :                 /*
    2792             :                  * This switch must handle all cases for which
    2793             :                  * nvme_ns_has_supported_iocs_specific_data() returns true,
    2794             :                  * other cases should never happen.
    2795             :                  */
    2796           0 :                 assert(0);
    2797             :         }
    2798             : 
    2799             :         return -EINVAL;
    2800             : }
    2801             : 
    2802             : static int
    2803          14 : nvme_ctrlr_identify_namespaces_iocs_specific(struct spdk_nvme_ctrlr *ctrlr)
    2804             : {
    2805          14 :         if (!nvme_ctrlr_multi_iocs_enabled(ctrlr)) {
    2806             :                 /* Multi IOCS not supported/enabled, move on to the next state */
    2807          14 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES,
    2808          14 :                                      ctrlr->opts.admin_timeout_ms);
    2809          14 :                 return 0;
    2810             :         }
    2811             : 
    2812           0 :         return nvme_ctrlr_identify_namespaces_iocs_specific_next(ctrlr, 0);
    2813             : }
    2814             : 
    2815             : static void
    2816           6 : nvme_ctrlr_identify_id_desc_async_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2817             : {
    2818           6 :         struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg;
    2819           6 :         struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr;
    2820             :         uint32_t nsid;
    2821             :         int rc;
    2822             : 
    2823           6 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2824             :                 /*
    2825             :                  * Many controllers claim to be compatible with NVMe 1.3, however,
    2826             :                  * they do not implement NS ID Desc List. Therefore, instead of setting
    2827             :                  * the state to NVME_CTRLR_STATE_ERROR, silently ignore the completion
    2828             :                  * error and move on to the next state.
    2829             :                  *
    2830             :                  * The proper way is to create a new quirk for controllers that violate
    2831             :                  * the NVMe 1.3 spec by not supporting NS ID Desc List.
    2832             :                  * (Re-using the NVME_QUIRK_IDENTIFY_CNS quirk is not possible, since
    2833             :                  * it is too generic and was added in order to handle controllers that
    2834             :                  * violate the NVMe 1.1 spec by not supporting ACTIVE LIST).
    2835             :                  */
    2836           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC,
    2837           0 :                                      ctrlr->opts.admin_timeout_ms);
    2838           0 :                 return;
    2839             :         }
    2840             : 
    2841           6 :         nvme_ns_set_id_desc_list_data(ns);
    2842             : 
    2843             :         /* move on to the next active NS */
    2844           6 :         nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id);
    2845           6 :         ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
    2846           6 :         if (ns == NULL) {
    2847           2 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC,
    2848           2 :                                      ctrlr->opts.admin_timeout_ms);
    2849           2 :                 return;
    2850             :         }
    2851             : 
    2852           4 :         rc = nvme_ctrlr_identify_id_desc_async(ns);
    2853           4 :         if (rc) {
    2854           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2855             :         }
    2856             : }
    2857             : 
    2858             : static int
    2859           6 : nvme_ctrlr_identify_id_desc_async(struct spdk_nvme_ns *ns)
    2860             : {
    2861           6 :         struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr;
    2862             : 
    2863           6 :         memset(ns->id_desc_list, 0, sizeof(ns->id_desc_list));
    2864             : 
    2865           6 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS,
    2866           6 :                              ctrlr->opts.admin_timeout_ms);
    2867          12 :         return nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS_ID_DESCRIPTOR_LIST,
    2868           6 :                                        0, ns->id, 0, ns->id_desc_list, sizeof(ns->id_desc_list),
    2869             :                                        nvme_ctrlr_identify_id_desc_async_done, ns);
    2870             : }
    2871             : 
    2872             : static int
    2873          14 : nvme_ctrlr_identify_id_desc_namespaces(struct spdk_nvme_ctrlr *ctrlr)
    2874             : {
    2875             :         uint32_t nsid;
    2876             :         struct spdk_nvme_ns *ns;
    2877             :         int rc;
    2878             : 
    2879          14 :         if ((ctrlr->vs.raw < SPDK_NVME_VERSION(1, 3, 0) &&
    2880          12 :              !(ctrlr->cap.bits.css & SPDK_NVME_CAP_CSS_IOCS)) ||
    2881           2 :             (ctrlr->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
    2882          12 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Version < 1.3; not attempting to retrieve NS ID Descriptor List\n");
    2883             :                 /* NS ID Desc List not supported, move on to the next state */
    2884          12 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC,
    2885          12 :                                      ctrlr->opts.admin_timeout_ms);
    2886          12 :                 return 0;
    2887             :         }
    2888             : 
    2889           2 :         nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr);
    2890           2 :         ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
    2891           2 :         if (ns == NULL) {
    2892             :                 /* No active NS, move on to the next state */
    2893           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC,
    2894           0 :                                      ctrlr->opts.admin_timeout_ms);
    2895           0 :                 return 0;
    2896             :         }
    2897             : 
    2898           2 :         rc = nvme_ctrlr_identify_id_desc_async(ns);
    2899           2 :         if (rc) {
    2900           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2901             :         }
    2902             : 
    2903           2 :         return rc;
    2904             : }
    2905             : 
    2906             : static void
    2907          19 : nvme_ctrlr_update_nvmf_ioccsz(struct spdk_nvme_ctrlr *ctrlr)
    2908             : {
    2909          19 :         if (spdk_nvme_ctrlr_is_fabrics(ctrlr)) {
    2910           4 :                 if (ctrlr->cdata.nvmf_specific.ioccsz < 4) {
    2911           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "Incorrect IOCCSZ %u, the minimum value should be 4\n",
    2912             :                                           ctrlr->cdata.nvmf_specific.ioccsz);
    2913           0 :                         ctrlr->cdata.nvmf_specific.ioccsz = 4;
    2914           0 :                         assert(0);
    2915             :                 }
    2916           4 :                 ctrlr->ioccsz_bytes = ctrlr->cdata.nvmf_specific.ioccsz * 16 - sizeof(struct spdk_nvme_cmd);
    2917           4 :                 ctrlr->icdoff = ctrlr->cdata.nvmf_specific.icdoff;
    2918             :         }
    2919          19 : }
    2920             : 
    2921             : static void
    2922          19 : nvme_ctrlr_set_num_queues_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2923             : {
    2924             :         uint32_t cq_allocated, sq_allocated, min_allocated, i;
    2925          19 :         struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg;
    2926             : 
    2927          19 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2928           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Set Features - Number of Queues failed!\n");
    2929           0 :                 ctrlr->opts.num_io_queues = 0;
    2930             :         } else {
    2931             :                 /*
    2932             :                  * Data in cdw0 is 0-based.
    2933             :                  * Lower 16-bits indicate number of submission queues allocated.
    2934             :                  * Upper 16-bits indicate number of completion queues allocated.
    2935             :                  */
    2936          19 :                 sq_allocated = (cpl->cdw0 & 0xFFFF) + 1;
    2937          19 :                 cq_allocated = (cpl->cdw0 >> 16) + 1;
    2938             : 
    2939             :                 /*
    2940             :                  * For 1:1 queue mapping, set number of allocated queues to be minimum of
    2941             :                  * submission and completion queues.
    2942             :                  */
    2943          19 :                 min_allocated = spdk_min(sq_allocated, cq_allocated);
    2944             : 
    2945             :                 /* Set number of queues to be minimum of requested and actually allocated. */
    2946          19 :                 ctrlr->opts.num_io_queues = spdk_min(min_allocated, ctrlr->opts.num_io_queues);
    2947             :         }
    2948             : 
    2949          19 :         ctrlr->free_io_qids = spdk_bit_array_create(ctrlr->opts.num_io_queues + 1);
    2950          19 :         if (ctrlr->free_io_qids == NULL) {
    2951           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2952           0 :                 return;
    2953             :         }
    2954             : 
    2955             :         /* Initialize list of free I/O queue IDs. QID 0 is the admin queue (implicitly allocated). */
    2956          69 :         for (i = 1; i <= ctrlr->opts.num_io_queues; i++) {
    2957          50 :                 spdk_nvme_ctrlr_free_qid(ctrlr, i);
    2958             :         }
    2959             : 
    2960          19 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS,
    2961          19 :                              ctrlr->opts.admin_timeout_ms);
    2962             : }
    2963             : 
    2964             : static int
    2965          19 : nvme_ctrlr_set_num_queues(struct spdk_nvme_ctrlr *ctrlr)
    2966             : {
    2967             :         int rc;
    2968             : 
    2969          19 :         if (ctrlr->opts.num_io_queues > SPDK_NVME_MAX_IO_QUEUES) {
    2970           0 :                 NVME_CTRLR_NOTICELOG(ctrlr, "Limiting requested num_io_queues %u to max %d\n",
    2971             :                                      ctrlr->opts.num_io_queues, SPDK_NVME_MAX_IO_QUEUES);
    2972           0 :                 ctrlr->opts.num_io_queues = SPDK_NVME_MAX_IO_QUEUES;
    2973          19 :         } else if (ctrlr->opts.num_io_queues < 1) {
    2974          13 :                 NVME_CTRLR_NOTICELOG(ctrlr, "Requested num_io_queues 0, increasing to 1\n");
    2975          13 :                 ctrlr->opts.num_io_queues = 1;
    2976             :         }
    2977             : 
    2978          19 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES,
    2979          19 :                              ctrlr->opts.admin_timeout_ms);
    2980             : 
    2981          19 :         rc = nvme_ctrlr_cmd_set_num_queues(ctrlr, ctrlr->opts.num_io_queues,
    2982             :                                            nvme_ctrlr_set_num_queues_done, ctrlr);
    2983          19 :         if (rc != 0) {
    2984           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    2985           0 :                 return rc;
    2986             :         }
    2987             : 
    2988          19 :         return 0;
    2989             : }
    2990             : 
    2991             : static void
    2992           3 : nvme_ctrlr_set_keep_alive_timeout_done(void *arg, const struct spdk_nvme_cpl *cpl)
    2993             : {
    2994             :         uint32_t keep_alive_interval_us;
    2995           3 :         struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg;
    2996             : 
    2997           3 :         if (spdk_nvme_cpl_is_error(cpl)) {
    2998           2 :                 if ((cpl->status.sct == SPDK_NVME_SCT_GENERIC) &&
    2999           2 :                     (cpl->status.sc == SPDK_NVME_SC_INVALID_FIELD)) {
    3000           1 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Keep alive timeout Get Feature is not supported\n");
    3001             :                 } else {
    3002           1 :                         NVME_CTRLR_ERRLOG(ctrlr, "Keep alive timeout Get Feature failed: SC %x SCT %x\n",
    3003             :                                           cpl->status.sc, cpl->status.sct);
    3004           1 :                         ctrlr->opts.keep_alive_timeout_ms = 0;
    3005           1 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3006           1 :                         return;
    3007             :                 }
    3008             :         } else {
    3009           1 :                 if (ctrlr->opts.keep_alive_timeout_ms != cpl->cdw0) {
    3010           1 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Controller adjusted keep alive timeout to %u ms\n",
    3011             :                                             cpl->cdw0);
    3012             :                 }
    3013             : 
    3014           1 :                 ctrlr->opts.keep_alive_timeout_ms = cpl->cdw0;
    3015             :         }
    3016             : 
    3017           2 :         if (ctrlr->opts.keep_alive_timeout_ms == 0) {
    3018           0 :                 ctrlr->keep_alive_interval_ticks = 0;
    3019             :         } else {
    3020           2 :                 keep_alive_interval_us = ctrlr->opts.keep_alive_timeout_ms * 1000 / 2;
    3021             : 
    3022           2 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Sending keep alive every %u us\n", keep_alive_interval_us);
    3023             : 
    3024           2 :                 ctrlr->keep_alive_interval_ticks = (keep_alive_interval_us * spdk_get_ticks_hz()) /
    3025             :                                                    UINT64_C(1000000);
    3026             : 
    3027             :                 /* Schedule the first Keep Alive to be sent as soon as possible. */
    3028           2 :                 ctrlr->next_keep_alive_tick = spdk_get_ticks();
    3029             :         }
    3030             : 
    3031           2 :         if (spdk_nvme_ctrlr_is_discovery(ctrlr)) {
    3032           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE);
    3033             :         } else {
    3034           2 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC,
    3035           2 :                                      ctrlr->opts.admin_timeout_ms);
    3036             :         }
    3037             : }
    3038             : 
    3039             : static int
    3040          22 : nvme_ctrlr_set_keep_alive_timeout(struct spdk_nvme_ctrlr *ctrlr)
    3041             : {
    3042             :         int rc;
    3043             : 
    3044          22 :         if (ctrlr->opts.keep_alive_timeout_ms == 0) {
    3045          19 :                 if (spdk_nvme_ctrlr_is_discovery(ctrlr)) {
    3046           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE);
    3047             :                 } else {
    3048          19 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC,
    3049          19 :                                              ctrlr->opts.admin_timeout_ms);
    3050             :                 }
    3051          19 :                 return 0;
    3052             :         }
    3053             : 
    3054             :         /* Note: Discovery controller identify data does not populate KAS according to spec. */
    3055           3 :         if (!spdk_nvme_ctrlr_is_discovery(ctrlr) && ctrlr->cdata.kas == 0) {
    3056           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Controller KAS is 0 - not enabling Keep Alive\n");
    3057           0 :                 ctrlr->opts.keep_alive_timeout_ms = 0;
    3058           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC,
    3059           0 :                                      ctrlr->opts.admin_timeout_ms);
    3060           0 :                 return 0;
    3061             :         }
    3062             : 
    3063           3 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT,
    3064           3 :                              ctrlr->opts.admin_timeout_ms);
    3065             : 
    3066             :         /* Retrieve actual keep alive timeout, since the controller may have adjusted it. */
    3067           3 :         rc = spdk_nvme_ctrlr_cmd_get_feature(ctrlr, SPDK_NVME_FEAT_KEEP_ALIVE_TIMER, 0, NULL, 0,
    3068             :                                              nvme_ctrlr_set_keep_alive_timeout_done, ctrlr);
    3069           3 :         if (rc != 0) {
    3070           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Keep alive timeout Get Feature failed: %d\n", rc);
    3071           0 :                 ctrlr->opts.keep_alive_timeout_ms = 0;
    3072           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3073           0 :                 return rc;
    3074             :         }
    3075             : 
    3076           3 :         return 0;
    3077             : }
    3078             : 
    3079             : static void
    3080           0 : nvme_ctrlr_set_host_id_done(void *arg, const struct spdk_nvme_cpl *cpl)
    3081             : {
    3082           0 :         struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg;
    3083             : 
    3084           0 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3085             :                 /*
    3086             :                  * Treat Set Features - Host ID failure as non-fatal, since the Host ID feature
    3087             :                  * is optional.
    3088             :                  */
    3089           0 :                 NVME_CTRLR_WARNLOG(ctrlr, "Set Features - Host ID failed: SC 0x%x SCT 0x%x\n",
    3090             :                                    cpl->status.sc, cpl->status.sct);
    3091             :         } else {
    3092           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Set Features - Host ID was successful\n");
    3093             :         }
    3094             : 
    3095           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_TRANSPORT_READY, ctrlr->opts.admin_timeout_ms);
    3096           0 : }
    3097             : 
    3098             : static int
    3099          14 : nvme_ctrlr_set_host_id(struct spdk_nvme_ctrlr *ctrlr)
    3100             : {
    3101             :         uint8_t *host_id;
    3102             :         uint32_t host_id_size;
    3103             :         int rc;
    3104             : 
    3105          14 :         if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) {
    3106             :                 /*
    3107             :                  * NVMe-oF sends the host ID during Connect and doesn't allow
    3108             :                  * Set Features - Host Identifier after Connect, so we don't need to do anything here.
    3109             :                  */
    3110          14 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "NVMe-oF transport - not sending Set Features - Host ID\n");
    3111          14 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_TRANSPORT_READY, ctrlr->opts.admin_timeout_ms);
    3112          14 :                 return 0;
    3113             :         }
    3114             : 
    3115           0 :         if (ctrlr->cdata.ctratt.bits.host_id_exhid_supported) {
    3116           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Using 128-bit extended host identifier\n");
    3117           0 :                 host_id = ctrlr->opts.extended_host_id;
    3118           0 :                 host_id_size = sizeof(ctrlr->opts.extended_host_id);
    3119             :         } else {
    3120           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Using 64-bit host identifier\n");
    3121           0 :                 host_id = ctrlr->opts.host_id;
    3122           0 :                 host_id_size = sizeof(ctrlr->opts.host_id);
    3123             :         }
    3124             : 
    3125             :         /* If the user specified an all-zeroes host identifier, don't send the command. */
    3126           0 :         if (spdk_mem_all_zero(host_id, host_id_size)) {
    3127           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "User did not specify host ID - not sending Set Features - Host ID\n");
    3128           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_TRANSPORT_READY, ctrlr->opts.admin_timeout_ms);
    3129           0 :                 return 0;
    3130             :         }
    3131             : 
    3132           0 :         SPDK_LOGDUMP(nvme, "host_id", host_id, host_id_size);
    3133             : 
    3134           0 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_HOST_ID,
    3135           0 :                              ctrlr->opts.admin_timeout_ms);
    3136             : 
    3137           0 :         rc = nvme_ctrlr_cmd_set_host_id(ctrlr, host_id, host_id_size, nvme_ctrlr_set_host_id_done, ctrlr);
    3138           0 :         if (rc != 0) {
    3139           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Set Features - Host ID failed: %d\n", rc);
    3140           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3141           0 :                 return rc;
    3142             :         }
    3143             : 
    3144           0 :         return 0;
    3145             : }
    3146             : 
    3147             : void
    3148           4 : nvme_ctrlr_update_namespaces(struct spdk_nvme_ctrlr *ctrlr)
    3149             : {
    3150             :         uint32_t nsid;
    3151             :         struct spdk_nvme_ns *ns;
    3152             : 
    3153           4 :         for (nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr);
    3154          19 :              nsid != 0; nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, nsid)) {
    3155          15 :                 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
    3156          15 :                 nvme_ns_construct(ns, nsid, ctrlr);
    3157             :         }
    3158           4 : }
    3159             : 
    3160             : static int
    3161           4 : nvme_ctrlr_clear_changed_ns_log(struct spdk_nvme_ctrlr *ctrlr)
    3162             : {
    3163             :         struct nvme_completion_poll_status      *status;
    3164           4 :         int             rc = -ENOMEM;
    3165           4 :         char            *buffer = NULL;
    3166             :         uint32_t        nsid;
    3167           4 :         size_t          buf_size = (SPDK_NVME_MAX_CHANGED_NAMESPACES * sizeof(uint32_t));
    3168             : 
    3169           4 :         if (ctrlr->opts.disable_read_changed_ns_list_log_page) {
    3170           0 :                 return 0;
    3171             :         }
    3172             : 
    3173           4 :         buffer = spdk_dma_zmalloc(buf_size, 4096, NULL);
    3174           4 :         if (!buffer) {
    3175           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate buffer for getting "
    3176             :                                   "changed ns log.\n");
    3177           0 :                 return rc;
    3178             :         }
    3179             : 
    3180           4 :         status = calloc(1, sizeof(*status));
    3181           4 :         if (!status) {
    3182           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
    3183           0 :                 goto free_buffer;
    3184             :         }
    3185             : 
    3186           4 :         rc = spdk_nvme_ctrlr_cmd_get_log_page(ctrlr,
    3187             :                                               SPDK_NVME_LOG_CHANGED_NS_LIST,
    3188             :                                               SPDK_NVME_GLOBAL_NS_TAG,
    3189             :                                               buffer, buf_size, 0,
    3190             :                                               nvme_completion_poll_cb, status);
    3191             : 
    3192           4 :         if (rc) {
    3193           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_cmd_get_log_page() failed: rc=%d\n", rc);
    3194           0 :                 free(status);
    3195           0 :                 goto free_buffer;
    3196             :         }
    3197             : 
    3198           4 :         rc = nvme_wait_for_completion_timeout(ctrlr->adminq, status,
    3199           4 :                                               ctrlr->opts.admin_timeout_ms * 1000);
    3200           4 :         if (!status->timed_out) {
    3201           4 :                 free(status);
    3202             :         }
    3203             : 
    3204           4 :         if (rc) {
    3205           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "wait for spdk_nvme_ctrlr_cmd_get_log_page failed: rc=%d\n", rc);
    3206           0 :                 goto free_buffer;
    3207             :         }
    3208             : 
    3209             :         /* only check the case of overflow. */
    3210           4 :         nsid = from_le32(buffer);
    3211           4 :         if (nsid == 0xffffffffu) {
    3212           0 :                 NVME_CTRLR_WARNLOG(ctrlr, "changed ns log overflowed.\n");
    3213             :         }
    3214             : 
    3215           4 : free_buffer:
    3216           4 :         spdk_dma_free(buffer);
    3217           4 :         return rc;
    3218             : }
    3219             : 
    3220             : static void
    3221           5 : nvme_ctrlr_process_async_event(struct spdk_nvme_ctrlr *ctrlr,
    3222             :                                const struct spdk_nvme_cpl *cpl)
    3223             : {
    3224             :         union spdk_nvme_async_event_completion event;
    3225             :         struct spdk_nvme_ctrlr_process *active_proc;
    3226             :         int rc;
    3227             : 
    3228           5 :         event.raw = cpl->cdw0;
    3229             : 
    3230           5 :         if ((event.bits.async_event_type == SPDK_NVME_ASYNC_EVENT_TYPE_NOTICE) &&
    3231           5 :             (event.bits.async_event_info == SPDK_NVME_ASYNC_EVENT_NS_ATTR_CHANGED)) {
    3232           4 :                 nvme_ctrlr_clear_changed_ns_log(ctrlr);
    3233             : 
    3234           4 :                 rc = nvme_ctrlr_identify_active_ns(ctrlr);
    3235           4 :                 if (rc) {
    3236           0 :                         return;
    3237             :                 }
    3238           4 :                 nvme_ctrlr_update_namespaces(ctrlr);
    3239           4 :                 nvme_io_msg_ctrlr_update(ctrlr);
    3240             :         }
    3241             : 
    3242           5 :         if ((event.bits.async_event_type == SPDK_NVME_ASYNC_EVENT_TYPE_NOTICE) &&
    3243           5 :             (event.bits.async_event_info == SPDK_NVME_ASYNC_EVENT_ANA_CHANGE)) {
    3244           1 :                 if (!ctrlr->opts.disable_read_ana_log_page) {
    3245           1 :                         rc = nvme_ctrlr_update_ana_log_page(ctrlr);
    3246           1 :                         if (rc) {
    3247           0 :                                 return;
    3248             :                         }
    3249           1 :                         nvme_ctrlr_parse_ana_log_page(ctrlr, nvme_ctrlr_update_ns_ana_states,
    3250             :                                                       ctrlr);
    3251             :                 }
    3252             :         }
    3253             : 
    3254           5 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
    3255           5 :         if (active_proc && active_proc->aer_cb_fn) {
    3256           3 :                 active_proc->aer_cb_fn(active_proc->aer_cb_arg, cpl);
    3257             :         }
    3258             : }
    3259             : 
    3260             : static void
    3261           5 : nvme_ctrlr_queue_async_event(struct spdk_nvme_ctrlr *ctrlr,
    3262             :                              const struct spdk_nvme_cpl *cpl)
    3263             : {
    3264             :         struct  spdk_nvme_ctrlr_aer_completion_list *nvme_event;
    3265             :         struct spdk_nvme_ctrlr_process *proc;
    3266             : 
    3267             :         /* Add async event to each process objects event list */
    3268          10 :         TAILQ_FOREACH(proc, &ctrlr->active_procs, tailq) {
    3269             :                 /* Must be shared memory so other processes can access */
    3270           5 :                 nvme_event = spdk_zmalloc(sizeof(*nvme_event), 0, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE);
    3271           5 :                 if (!nvme_event) {
    3272           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "Alloc nvme event failed, ignore the event\n");
    3273           0 :                         return;
    3274             :                 }
    3275           5 :                 nvme_event->cpl = *cpl;
    3276             : 
    3277           5 :                 STAILQ_INSERT_TAIL(&proc->async_events, nvme_event, link);
    3278             :         }
    3279             : }
    3280             : 
    3281             : static void
    3282           5 : nvme_ctrlr_complete_queued_async_events(struct spdk_nvme_ctrlr *ctrlr)
    3283             : {
    3284             :         struct  spdk_nvme_ctrlr_aer_completion_list  *nvme_event, *nvme_event_tmp;
    3285             :         struct spdk_nvme_ctrlr_process  *active_proc;
    3286             : 
    3287           5 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
    3288             : 
    3289          10 :         STAILQ_FOREACH_SAFE(nvme_event, &active_proc->async_events, link, nvme_event_tmp) {
    3290           5 :                 STAILQ_REMOVE(&active_proc->async_events, nvme_event,
    3291             :                               spdk_nvme_ctrlr_aer_completion_list, link);
    3292           5 :                 nvme_ctrlr_process_async_event(ctrlr, &nvme_event->cpl);
    3293           5 :                 spdk_free(nvme_event);
    3294             : 
    3295             :         }
    3296           5 : }
    3297             : 
    3298             : static void
    3299           5 : nvme_ctrlr_async_event_cb(void *arg, const struct spdk_nvme_cpl *cpl)
    3300             : {
    3301           5 :         struct nvme_async_event_request *aer = arg;
    3302           5 :         struct spdk_nvme_ctrlr          *ctrlr = aer->ctrlr;
    3303             : 
    3304           5 :         if (cpl->status.sct == SPDK_NVME_SCT_GENERIC &&
    3305           5 :             cpl->status.sc == SPDK_NVME_SC_ABORTED_SQ_DELETION) {
    3306             :                 /*
    3307             :                  *  This is simulated when controller is being shut down, to
    3308             :                  *  effectively abort outstanding asynchronous event requests
    3309             :                  *  and make sure all memory is freed.  Do not repost the
    3310             :                  *  request in this case.
    3311             :                  */
    3312           0 :                 return;
    3313             :         }
    3314             : 
    3315           5 :         if (cpl->status.sct == SPDK_NVME_SCT_COMMAND_SPECIFIC &&
    3316           0 :             cpl->status.sc == SPDK_NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED) {
    3317             :                 /*
    3318             :                  *  SPDK will only send as many AERs as the device says it supports,
    3319             :                  *  so this status code indicates an out-of-spec device.  Do not repost
    3320             :                  *  the request in this case.
    3321             :                  */
    3322           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Controller appears out-of-spec for asynchronous event request\n"
    3323             :                                   "handling.  Do not repost this AER.\n");
    3324           0 :                 return;
    3325             :         }
    3326             : 
    3327             :         /* Add the events to the list */
    3328           5 :         nvme_ctrlr_queue_async_event(ctrlr, cpl);
    3329             : 
    3330             :         /* If the ctrlr was removed or in the destruct state, we should not send aer again */
    3331           5 :         if (ctrlr->is_removed || ctrlr->is_destructed) {
    3332           0 :                 return;
    3333             :         }
    3334             : 
    3335             :         /*
    3336             :          * Repost another asynchronous event request to replace the one
    3337             :          *  that just completed.
    3338             :          */
    3339           5 :         if (nvme_ctrlr_construct_and_submit_aer(ctrlr, aer)) {
    3340             :                 /*
    3341             :                  * We can't do anything to recover from a failure here,
    3342             :                  * so just print a warning message and leave the AER unsubmitted.
    3343             :                  */
    3344           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "resubmitting AER failed!\n");
    3345             :         }
    3346             : }
    3347             : 
    3348             : static int
    3349          24 : nvme_ctrlr_construct_and_submit_aer(struct spdk_nvme_ctrlr *ctrlr,
    3350             :                                     struct nvme_async_event_request *aer)
    3351             : {
    3352             :         struct nvme_request *req;
    3353             : 
    3354          24 :         aer->ctrlr = ctrlr;
    3355          24 :         req = nvme_allocate_request_null(ctrlr->adminq, nvme_ctrlr_async_event_cb, aer);
    3356          24 :         aer->req = req;
    3357          24 :         if (req == NULL) {
    3358           0 :                 return -1;
    3359             :         }
    3360             : 
    3361          24 :         req->cmd.opc = SPDK_NVME_OPC_ASYNC_EVENT_REQUEST;
    3362          24 :         return nvme_ctrlr_submit_admin_request(ctrlr, req);
    3363             : }
    3364             : 
    3365             : static void
    3366          19 : nvme_ctrlr_configure_aer_done(void *arg, const struct spdk_nvme_cpl *cpl)
    3367             : {
    3368             :         struct nvme_async_event_request         *aer;
    3369             :         int                                     rc;
    3370             :         uint32_t                                i;
    3371          19 :         struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg;
    3372             : 
    3373          19 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3374           0 :                 NVME_CTRLR_NOTICELOG(ctrlr, "nvme_ctrlr_configure_aer failed!\n");
    3375           0 :                 ctrlr->num_aers = 0;
    3376             :         } else {
    3377             :                 /* aerl is a zero-based value, so we need to add 1 here. */
    3378          19 :                 ctrlr->num_aers = spdk_min(NVME_MAX_ASYNC_EVENTS, (ctrlr->cdata.aerl + 1));
    3379             :         }
    3380             : 
    3381          38 :         for (i = 0; i < ctrlr->num_aers; i++) {
    3382          19 :                 aer = &ctrlr->aer[i];
    3383          19 :                 rc = nvme_ctrlr_construct_and_submit_aer(ctrlr, aer);
    3384          19 :                 if (rc) {
    3385           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "nvme_ctrlr_construct_and_submit_aer failed!\n");
    3386           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3387           0 :                         return;
    3388             :                 }
    3389             :         }
    3390          19 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, ctrlr->opts.admin_timeout_ms);
    3391             : }
    3392             : 
    3393             : static int
    3394          19 : nvme_ctrlr_configure_aer(struct spdk_nvme_ctrlr *ctrlr)
    3395             : {
    3396             :         union spdk_nvme_feat_async_event_configuration  config;
    3397             :         int                                             rc;
    3398             : 
    3399          19 :         config.raw = 0;
    3400             : 
    3401          19 :         if (spdk_nvme_ctrlr_is_discovery(ctrlr)) {
    3402           0 :                 config.bits.discovery_log_change_notice = 1;
    3403             :         } else {
    3404          19 :                 config.bits.crit_warn.bits.available_spare = 1;
    3405          19 :                 config.bits.crit_warn.bits.temperature = 1;
    3406          19 :                 config.bits.crit_warn.bits.device_reliability = 1;
    3407          19 :                 config.bits.crit_warn.bits.read_only = 1;
    3408          19 :                 config.bits.crit_warn.bits.volatile_memory_backup = 1;
    3409             : 
    3410          19 :                 if (ctrlr->vs.raw >= SPDK_NVME_VERSION(1, 2, 0)) {
    3411           4 :                         if (ctrlr->cdata.oaes.ns_attribute_notices) {
    3412           0 :                                 config.bits.ns_attr_notice = 1;
    3413             :                         }
    3414           4 :                         if (ctrlr->cdata.oaes.fw_activation_notices) {
    3415           0 :                                 config.bits.fw_activation_notice = 1;
    3416             :                         }
    3417           4 :                         if (ctrlr->cdata.oaes.ana_change_notices) {
    3418           0 :                                 config.bits.ana_change_notice = 1;
    3419             :                         }
    3420             :                 }
    3421          19 :                 if (ctrlr->vs.raw >= SPDK_NVME_VERSION(1, 3, 0) && ctrlr->cdata.lpa.telemetry) {
    3422           0 :                         config.bits.telemetry_log_notice = 1;
    3423             :                 }
    3424             :         }
    3425             : 
    3426          19 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER,
    3427          19 :                              ctrlr->opts.admin_timeout_ms);
    3428             : 
    3429          19 :         rc = nvme_ctrlr_cmd_set_async_event_config(ctrlr, config,
    3430             :                         nvme_ctrlr_configure_aer_done,
    3431             :                         ctrlr);
    3432          19 :         if (rc != 0) {
    3433           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3434           0 :                 return rc;
    3435             :         }
    3436             : 
    3437          19 :         return 0;
    3438             : }
    3439             : 
    3440             : struct spdk_nvme_ctrlr_process *
    3441          61 : nvme_ctrlr_get_process(struct spdk_nvme_ctrlr *ctrlr, pid_t pid)
    3442             : {
    3443             :         struct spdk_nvme_ctrlr_process  *active_proc;
    3444             : 
    3445          61 :         TAILQ_FOREACH(active_proc, &ctrlr->active_procs, tailq) {
    3446          12 :                 if (active_proc->pid == pid) {
    3447          12 :                         return active_proc;
    3448             :                 }
    3449             :         }
    3450             : 
    3451          49 :         return NULL;
    3452             : }
    3453             : 
    3454             : struct spdk_nvme_ctrlr_process *
    3455          57 : nvme_ctrlr_get_current_process(struct spdk_nvme_ctrlr *ctrlr)
    3456             : {
    3457          57 :         return nvme_ctrlr_get_process(ctrlr, getpid());
    3458             : }
    3459             : 
    3460             : /**
    3461             :  * This function will be called when a process is using the controller.
    3462             :  *  1. For the primary process, it is called when constructing the controller.
    3463             :  *  2. For the secondary process, it is called at probing the controller.
    3464             :  * Note: will check whether the process is already added for the same process.
    3465             :  */
    3466             : int
    3467           4 : nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle)
    3468             : {
    3469             :         struct spdk_nvme_ctrlr_process  *ctrlr_proc;
    3470           4 :         pid_t                           pid = getpid();
    3471             : 
    3472             :         /* Check whether the process is already added or not */
    3473           4 :         if (nvme_ctrlr_get_process(ctrlr, pid)) {
    3474           0 :                 return 0;
    3475             :         }
    3476             : 
    3477             :         /* Initialize the per process properties for this ctrlr */
    3478           4 :         ctrlr_proc = spdk_zmalloc(sizeof(struct spdk_nvme_ctrlr_process),
    3479             :                                   64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE);
    3480           4 :         if (ctrlr_proc == NULL) {
    3481           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "failed to allocate memory to track the process props\n");
    3482             : 
    3483           0 :                 return -1;
    3484             :         }
    3485             : 
    3486           4 :         ctrlr_proc->is_primary = spdk_process_is_primary();
    3487           4 :         ctrlr_proc->pid = pid;
    3488           4 :         STAILQ_INIT(&ctrlr_proc->active_reqs);
    3489           4 :         ctrlr_proc->devhandle = devhandle;
    3490           4 :         ctrlr_proc->ref = 0;
    3491           4 :         TAILQ_INIT(&ctrlr_proc->allocated_io_qpairs);
    3492           4 :         STAILQ_INIT(&ctrlr_proc->async_events);
    3493             : 
    3494           4 :         TAILQ_INSERT_TAIL(&ctrlr->active_procs, ctrlr_proc, tailq);
    3495             : 
    3496           4 :         return 0;
    3497             : }
    3498             : 
    3499             : /**
    3500             :  * This function will be called when the process detaches the controller.
    3501             :  * Note: the ctrlr_lock must be held when calling this function.
    3502             :  */
    3503             : static void
    3504           1 : nvme_ctrlr_remove_process(struct spdk_nvme_ctrlr *ctrlr,
    3505             :                           struct spdk_nvme_ctrlr_process *proc)
    3506             : {
    3507             :         struct spdk_nvme_qpair  *qpair, *tmp_qpair;
    3508             : 
    3509           1 :         assert(STAILQ_EMPTY(&proc->active_reqs));
    3510             : 
    3511           1 :         TAILQ_FOREACH_SAFE(qpair, &proc->allocated_io_qpairs, per_process_tailq, tmp_qpair) {
    3512           0 :                 spdk_nvme_ctrlr_free_io_qpair(qpair);
    3513             :         }
    3514             : 
    3515           1 :         TAILQ_REMOVE(&ctrlr->active_procs, proc, tailq);
    3516             : 
    3517           1 :         if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) {
    3518           1 :                 spdk_pci_device_detach(proc->devhandle);
    3519             :         }
    3520             : 
    3521           1 :         spdk_free(proc);
    3522           1 : }
    3523             : 
    3524             : /**
    3525             :  * This function will be called when the process exited unexpectedly
    3526             :  *  in order to free any incomplete nvme request, allocated IO qpairs
    3527             :  *  and allocated memory.
    3528             :  * Note: the ctrlr_lock must be held when calling this function.
    3529             :  */
    3530             : static void
    3531           0 : nvme_ctrlr_cleanup_process(struct spdk_nvme_ctrlr_process *proc)
    3532             : {
    3533             :         struct nvme_request     *req, *tmp_req;
    3534             :         struct spdk_nvme_qpair  *qpair, *tmp_qpair;
    3535             :         struct spdk_nvme_ctrlr_aer_completion_list *event;
    3536             : 
    3537           0 :         STAILQ_FOREACH_SAFE(req, &proc->active_reqs, stailq, tmp_req) {
    3538           0 :                 STAILQ_REMOVE(&proc->active_reqs, req, nvme_request, stailq);
    3539             : 
    3540           0 :                 assert(req->pid == proc->pid);
    3541           0 :                 nvme_cleanup_user_req(req);
    3542           0 :                 nvme_free_request(req);
    3543             :         }
    3544             : 
    3545             :         /* Remove async event from each process objects event list */
    3546           0 :         while (!STAILQ_EMPTY(&proc->async_events)) {
    3547           0 :                 event = STAILQ_FIRST(&proc->async_events);
    3548           0 :                 STAILQ_REMOVE_HEAD(&proc->async_events, link);
    3549           0 :                 spdk_free(event);
    3550             :         }
    3551             : 
    3552           0 :         TAILQ_FOREACH_SAFE(qpair, &proc->allocated_io_qpairs, per_process_tailq, tmp_qpair) {
    3553           0 :                 TAILQ_REMOVE(&proc->allocated_io_qpairs, qpair, per_process_tailq);
    3554             : 
    3555             :                 /*
    3556             :                  * The process may have been killed while some qpairs were in their
    3557             :                  *  completion context.  Clear that flag here to allow these IO
    3558             :                  *  qpairs to be deleted.
    3559             :                  */
    3560           0 :                 qpair->in_completion_context = 0;
    3561             : 
    3562           0 :                 qpair->no_deletion_notification_needed = 1;
    3563             : 
    3564           0 :                 spdk_nvme_ctrlr_free_io_qpair(qpair);
    3565             :         }
    3566             : 
    3567           0 :         spdk_free(proc);
    3568           0 : }
    3569             : 
    3570             : /**
    3571             :  * This function will be called when destructing the controller.
    3572             :  *  1. There is no more admin request on this controller.
    3573             :  *  2. Clean up any left resource allocation when its associated process is gone.
    3574             :  */
    3575             : void
    3576          50 : nvme_ctrlr_free_processes(struct spdk_nvme_ctrlr *ctrlr)
    3577             : {
    3578             :         struct spdk_nvme_ctrlr_process  *active_proc, *tmp;
    3579             : 
    3580             :         /* Free all the processes' properties and make sure no pending admin IOs */
    3581          53 :         TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) {
    3582           3 :                 TAILQ_REMOVE(&ctrlr->active_procs, active_proc, tailq);
    3583             : 
    3584           3 :                 assert(STAILQ_EMPTY(&active_proc->active_reqs));
    3585             : 
    3586           3 :                 spdk_free(active_proc);
    3587             :         }
    3588          50 : }
    3589             : 
    3590             : /**
    3591             :  * This function will be called when any other process attaches or
    3592             :  *  detaches the controller in order to cleanup those unexpectedly
    3593             :  *  terminated processes.
    3594             :  * Note: the ctrlr_lock must be held when calling this function.
    3595             :  */
    3596             : static int
    3597           0 : nvme_ctrlr_remove_inactive_proc(struct spdk_nvme_ctrlr *ctrlr)
    3598             : {
    3599             :         struct spdk_nvme_ctrlr_process  *active_proc, *tmp;
    3600           0 :         int                             active_proc_count = 0;
    3601             : 
    3602           0 :         TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) {
    3603           0 :                 if ((kill(active_proc->pid, 0) == -1) && (errno == ESRCH)) {
    3604           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "process %d terminated unexpected\n", active_proc->pid);
    3605             : 
    3606           0 :                         TAILQ_REMOVE(&ctrlr->active_procs, active_proc, tailq);
    3607             : 
    3608           0 :                         nvme_ctrlr_cleanup_process(active_proc);
    3609             :                 } else {
    3610           0 :                         active_proc_count++;
    3611             :                 }
    3612             :         }
    3613             : 
    3614           0 :         return active_proc_count;
    3615             : }
    3616             : 
    3617             : void
    3618           0 : nvme_ctrlr_proc_get_ref(struct spdk_nvme_ctrlr *ctrlr)
    3619             : {
    3620             :         struct spdk_nvme_ctrlr_process  *active_proc;
    3621             : 
    3622           0 :         nvme_ctrlr_lock(ctrlr);
    3623             : 
    3624           0 :         nvme_ctrlr_remove_inactive_proc(ctrlr);
    3625             : 
    3626           0 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
    3627           0 :         if (active_proc) {
    3628           0 :                 active_proc->ref++;
    3629             :         }
    3630             : 
    3631           0 :         nvme_ctrlr_unlock(ctrlr);
    3632           0 : }
    3633             : 
    3634             : void
    3635           0 : nvme_ctrlr_proc_put_ref(struct spdk_nvme_ctrlr *ctrlr)
    3636             : {
    3637             :         struct spdk_nvme_ctrlr_process  *active_proc;
    3638             :         int                             proc_count;
    3639             : 
    3640           0 :         nvme_ctrlr_lock(ctrlr);
    3641             : 
    3642           0 :         proc_count = nvme_ctrlr_remove_inactive_proc(ctrlr);
    3643             : 
    3644           0 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
    3645           0 :         if (active_proc) {
    3646           0 :                 active_proc->ref--;
    3647           0 :                 assert(active_proc->ref >= 0);
    3648             : 
    3649             :                 /*
    3650             :                  * The last active process will be removed at the end of
    3651             :                  * the destruction of the controller.
    3652             :                  */
    3653           0 :                 if (active_proc->ref == 0 && proc_count != 1) {
    3654           0 :                         nvme_ctrlr_remove_process(ctrlr, active_proc);
    3655             :                 }
    3656             :         }
    3657             : 
    3658           0 :         nvme_ctrlr_unlock(ctrlr);
    3659           0 : }
    3660             : 
    3661             : int
    3662           0 : nvme_ctrlr_get_ref_count(struct spdk_nvme_ctrlr *ctrlr)
    3663             : {
    3664             :         struct spdk_nvme_ctrlr_process  *active_proc;
    3665           0 :         int                             ref = 0;
    3666             : 
    3667           0 :         nvme_ctrlr_lock(ctrlr);
    3668             : 
    3669           0 :         nvme_ctrlr_remove_inactive_proc(ctrlr);
    3670             : 
    3671           0 :         TAILQ_FOREACH(active_proc, &ctrlr->active_procs, tailq) {
    3672           0 :                 ref += active_proc->ref;
    3673             :         }
    3674             : 
    3675           0 :         nvme_ctrlr_unlock(ctrlr);
    3676             : 
    3677           0 :         return ref;
    3678             : }
    3679             : 
    3680             : /**
    3681             :  *  Get the PCI device handle which is only visible to its associated process.
    3682             :  */
    3683             : struct spdk_pci_device *
    3684           0 : nvme_ctrlr_proc_get_devhandle(struct spdk_nvme_ctrlr *ctrlr)
    3685             : {
    3686             :         struct spdk_nvme_ctrlr_process  *active_proc;
    3687           0 :         struct spdk_pci_device          *devhandle = NULL;
    3688             : 
    3689           0 :         nvme_ctrlr_lock(ctrlr);
    3690             : 
    3691           0 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
    3692           0 :         if (active_proc) {
    3693           0 :                 devhandle = active_proc->devhandle;
    3694             :         }
    3695             : 
    3696           0 :         nvme_ctrlr_unlock(ctrlr);
    3697             : 
    3698           0 :         return devhandle;
    3699             : }
    3700             : 
    3701             : static void
    3702          21 : nvme_ctrlr_process_init_vs_done(void *ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    3703             : {
    3704          21 :         struct spdk_nvme_ctrlr *ctrlr = ctx;
    3705             : 
    3706          21 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3707           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the VS register\n");
    3708           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3709           0 :                 return;
    3710             :         }
    3711             : 
    3712          21 :         assert(value <= UINT32_MAX);
    3713          21 :         ctrlr->vs.raw = (uint32_t)value;
    3714          21 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READ_CAP, NVME_TIMEOUT_INFINITE);
    3715             : }
    3716             : 
    3717             : static void
    3718          21 : nvme_ctrlr_process_init_cap_done(void *ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    3719             : {
    3720          21 :         struct spdk_nvme_ctrlr *ctrlr = ctx;
    3721             : 
    3722          21 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3723           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the CAP register\n");
    3724           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3725           0 :                 return;
    3726             :         }
    3727             : 
    3728          21 :         ctrlr->cap.raw = value;
    3729          21 :         nvme_ctrlr_init_cap(ctrlr);
    3730          21 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CHECK_EN, NVME_TIMEOUT_INFINITE);
    3731             : }
    3732             : 
    3733             : static void
    3734          22 : nvme_ctrlr_process_init_check_en(void *ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    3735             : {
    3736          22 :         struct spdk_nvme_ctrlr *ctrlr = ctx;
    3737             :         enum nvme_ctrlr_state state;
    3738             : 
    3739          22 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3740           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the CC register\n");
    3741           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3742           0 :                 return;
    3743             :         }
    3744             : 
    3745          22 :         assert(value <= UINT32_MAX);
    3746          22 :         ctrlr->process_init_cc.raw = (uint32_t)value;
    3747             : 
    3748          22 :         if (ctrlr->process_init_cc.bits.en) {
    3749           2 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "CC.EN = 1\n");
    3750           2 :                 state = NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1;
    3751             :         } else {
    3752          20 :                 state = NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0;
    3753             :         }
    3754             : 
    3755          22 :         nvme_ctrlr_set_state(ctrlr, state, nvme_ctrlr_get_ready_timeout(ctrlr));
    3756             : }
    3757             : 
    3758             : static void
    3759           2 : nvme_ctrlr_process_init_set_en_0(void *ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    3760             : {
    3761           2 :         struct spdk_nvme_ctrlr *ctrlr = ctx;
    3762             : 
    3763           2 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3764           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to write the CC register\n");
    3765           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3766           0 :                 return;
    3767             :         }
    3768             : 
    3769             :         /*
    3770             :          * Wait 2.5 seconds before accessing PCI registers.
    3771             :          * Not using sleep() to avoid blocking other controller's initialization.
    3772             :          */
    3773           2 :         if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) {
    3774           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Applying quirk: delay 2.5 seconds before reading registers\n");
    3775           0 :                 ctrlr->sleep_timeout_tsc = spdk_get_ticks() + (2500 * spdk_get_ticks_hz() / 1000);
    3776             :         }
    3777             : 
    3778           2 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0,
    3779             :                              nvme_ctrlr_get_ready_timeout(ctrlr));
    3780             : }
    3781             : 
    3782             : static void
    3783           2 : nvme_ctrlr_process_init_set_en_0_read_cc(void *ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    3784             : {
    3785           2 :         struct spdk_nvme_ctrlr *ctrlr = ctx;
    3786             :         union spdk_nvme_cc_register cc;
    3787             :         int rc;
    3788             : 
    3789           2 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3790           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the CC register\n");
    3791           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3792           0 :                 return;
    3793             :         }
    3794             : 
    3795           2 :         assert(value <= UINT32_MAX);
    3796           2 :         cc.raw = (uint32_t)value;
    3797           2 :         cc.bits.en = 0;
    3798           2 :         ctrlr->process_init_cc.raw = cc.raw;
    3799             : 
    3800           2 :         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_EN_0_WAIT_FOR_CC,
    3801             :                              nvme_ctrlr_get_ready_timeout(ctrlr));
    3802             : 
    3803           2 :         rc = nvme_ctrlr_set_cc_async(ctrlr, cc.raw, nvme_ctrlr_process_init_set_en_0, ctrlr);
    3804           2 :         if (rc != 0) {
    3805           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "set_cc() failed\n");
    3806           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3807             :         }
    3808             : }
    3809             : 
    3810             : static void
    3811           2 : nvme_ctrlr_process_init_wait_for_ready_1(void *ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    3812             : {
    3813           2 :         struct spdk_nvme_ctrlr *ctrlr = ctx;
    3814             :         union spdk_nvme_csts_register csts;
    3815             : 
    3816           2 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3817             :                 /* While a device is resetting, it may be unable to service MMIO reads
    3818             :                  * temporarily. Allow for this case.
    3819             :                  */
    3820           0 :                 if (!ctrlr->is_failed && ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE) {
    3821           0 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Failed to read the CSTS register\n");
    3822           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1,
    3823             :                                              NVME_TIMEOUT_KEEP_EXISTING);
    3824             :                 } else {
    3825           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the CSTS register\n");
    3826           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3827             :                 }
    3828             : 
    3829           0 :                 return;
    3830             :         }
    3831             : 
    3832           2 :         assert(value <= UINT32_MAX);
    3833           2 :         csts.raw = (uint32_t)value;
    3834           2 :         if (csts.bits.rdy == 1 || csts.bits.cfs == 1) {
    3835           2 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_EN_0,
    3836             :                                      nvme_ctrlr_get_ready_timeout(ctrlr));
    3837             :         } else {
    3838           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "CC.EN = 1 && CSTS.RDY = 0 - waiting for reset to complete\n");
    3839           0 :                 nvme_ctrlr_set_state_quiet(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1,
    3840             :                                            NVME_TIMEOUT_KEEP_EXISTING);
    3841             :         }
    3842             : }
    3843             : 
    3844             : static void
    3845          22 : nvme_ctrlr_process_init_wait_for_ready_0(void *ctx, uint64_t value, const struct spdk_nvme_cpl *cpl)
    3846             : {
    3847          22 :         struct spdk_nvme_ctrlr *ctrlr = ctx;
    3848             :         union spdk_nvme_csts_register csts;
    3849             : 
    3850          22 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3851             :                 /* While a device is resetting, it may be unable to service MMIO reads
    3852             :                  * temporarily. Allow for this case.
    3853             :                  */
    3854           0 :                 if (!ctrlr->is_failed && ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE) {
    3855           0 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Failed to read the CSTS register\n");
    3856           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0,
    3857             :                                              NVME_TIMEOUT_KEEP_EXISTING);
    3858             :                 } else {
    3859           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the CSTS register\n");
    3860           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3861             :                 }
    3862             : 
    3863           0 :                 return;
    3864             :         }
    3865             : 
    3866          22 :         assert(value <= UINT32_MAX);
    3867          22 :         csts.raw = (uint32_t)value;
    3868          22 :         if (csts.bits.rdy == 0) {
    3869          22 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "CC.EN = 0 && CSTS.RDY = 0\n");
    3870          22 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLED,
    3871             :                                      nvme_ctrlr_get_ready_timeout(ctrlr));
    3872             :         } else {
    3873           0 :                 nvme_ctrlr_set_state_quiet(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0,
    3874             :                                            NVME_TIMEOUT_KEEP_EXISTING);
    3875             :         }
    3876             : }
    3877             : 
    3878             : static void
    3879           9 : nvme_ctrlr_process_init_enable_wait_for_ready_1(void *ctx, uint64_t value,
    3880             :                 const struct spdk_nvme_cpl *cpl)
    3881             : {
    3882           9 :         struct spdk_nvme_ctrlr *ctrlr = ctx;
    3883             :         union spdk_nvme_csts_register csts;
    3884             : 
    3885           9 :         if (spdk_nvme_cpl_is_error(cpl)) {
    3886             :                 /* While a device is resetting, it may be unable to service MMIO reads
    3887             :                  * temporarily. Allow for this case.
    3888             :                  */
    3889           0 :                 if (!ctrlr->is_failed && ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE) {
    3890           0 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Failed to read the CSTS register\n");
    3891           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1,
    3892             :                                              NVME_TIMEOUT_KEEP_EXISTING);
    3893             :                 } else {
    3894           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "Failed to read the CSTS register\n");
    3895           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3896             :                 }
    3897             : 
    3898           0 :                 return;
    3899             :         }
    3900             : 
    3901           9 :         assert(value <= UINT32_MAX);
    3902           9 :         csts.raw = value;
    3903           9 :         if (csts.bits.rdy == 1) {
    3904           9 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "CC.EN = 1 && CSTS.RDY = 1 - controller is ready\n");
    3905             :                 /*
    3906             :                  * The controller has been enabled.
    3907             :                  *  Perform the rest of initialization serially.
    3908             :                  */
    3909           9 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_RESET_ADMIN_QUEUE,
    3910           9 :                                      ctrlr->opts.admin_timeout_ms);
    3911             :         } else {
    3912           0 :                 nvme_ctrlr_set_state_quiet(ctrlr, NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1,
    3913             :                                            NVME_TIMEOUT_KEEP_EXISTING);
    3914             :         }
    3915             : }
    3916             : 
    3917             : /**
    3918             :  * This function will be called repeatedly during initialization until the controller is ready.
    3919             :  */
    3920             : int
    3921         446 : nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr)
    3922             : {
    3923             :         uint32_t ready_timeout_in_ms;
    3924             :         uint64_t ticks;
    3925         446 :         int rc = 0;
    3926             : 
    3927         446 :         ticks = spdk_get_ticks();
    3928             : 
    3929             :         /*
    3930             :          * May need to avoid accessing any register on the target controller
    3931             :          * for a while. Return early without touching the FSM.
    3932             :          * Check sleep_timeout_tsc > 0 for unit test.
    3933             :          */
    3934         446 :         if ((ctrlr->sleep_timeout_tsc > 0) &&
    3935           2 :             (ticks <= ctrlr->sleep_timeout_tsc)) {
    3936           1 :                 return 0;
    3937             :         }
    3938         445 :         ctrlr->sleep_timeout_tsc = 0;
    3939             : 
    3940         445 :         ready_timeout_in_ms = nvme_ctrlr_get_ready_timeout(ctrlr);
    3941             : 
    3942             :         /*
    3943             :          * Check if the current initialization step is done or has timed out.
    3944             :          */
    3945         445 :         switch (ctrlr->state) {
    3946           1 :         case NVME_CTRLR_STATE_INIT_DELAY:
    3947           1 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, ready_timeout_in_ms);
    3948           1 :                 if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_INIT) {
    3949             :                         /*
    3950             :                          * Controller may need some delay before it's enabled.
    3951             :                          *
    3952             :                          * This is a workaround for an issue where the PCIe-attached NVMe controller
    3953             :                          * is not ready after VFIO reset. We delay the initialization rather than the
    3954             :                          * enabling itself, because this is required only for the very first enabling
    3955             :                          * - directly after a VFIO reset.
    3956             :                          */
    3957           1 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Adding 2 second delay before initializing the controller\n");
    3958           1 :                         ctrlr->sleep_timeout_tsc = ticks + (2000 * spdk_get_ticks_hz() / 1000);
    3959             :                 }
    3960           1 :                 break;
    3961             : 
    3962           0 :         case NVME_CTRLR_STATE_DISCONNECTED:
    3963           0 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, NVME_TIMEOUT_INFINITE);
    3964           0 :                 break;
    3965             : 
    3966          21 :         case NVME_CTRLR_STATE_CONNECT_ADMINQ: /* synonymous with NVME_CTRLR_STATE_INIT and NVME_CTRLR_STATE_DISCONNECTED */
    3967          21 :                 rc = nvme_transport_ctrlr_connect_qpair(ctrlr, ctrlr->adminq);
    3968          21 :                 if (rc == 0) {
    3969          21 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_CONNECT_ADMINQ,
    3970             :                                              NVME_TIMEOUT_INFINITE);
    3971             :                 } else {
    3972           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    3973             :                 }
    3974          21 :                 break;
    3975             : 
    3976          21 :         case NVME_CTRLR_STATE_WAIT_FOR_CONNECT_ADMINQ:
    3977          21 :                 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
    3978             : 
    3979          21 :                 switch (nvme_qpair_get_state(ctrlr->adminq)) {
    3980           0 :                 case NVME_QPAIR_CONNECTING:
    3981           0 :                         break;
    3982          21 :                 case NVME_QPAIR_CONNECTED:
    3983          21 :                         nvme_qpair_set_state(ctrlr->adminq, NVME_QPAIR_ENABLED);
    3984             :                 /* Fall through */
    3985          21 :                 case NVME_QPAIR_ENABLED:
    3986          21 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READ_VS,
    3987             :                                              NVME_TIMEOUT_INFINITE);
    3988             :                         /* Abort any queued requests that were sent while the adminq was connecting
    3989             :                          * to avoid stalling the init process during a reset, as requests don't get
    3990             :                          * resubmitted while the controller is resetting and subsequent commands
    3991             :                          * would get queued too.
    3992             :                          */
    3993          21 :                         nvme_qpair_abort_queued_reqs(ctrlr->adminq);
    3994          21 :                         break;
    3995           0 :                 case NVME_QPAIR_DISCONNECTING:
    3996           0 :                         assert(ctrlr->adminq->async == true);
    3997           0 :                         break;
    3998           0 :                 case NVME_QPAIR_DISCONNECTED:
    3999             :                 /* fallthrough */
    4000             :                 default:
    4001           0 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    4002           0 :                         break;
    4003             :                 }
    4004             : 
    4005          21 :                 break;
    4006             : 
    4007          21 :         case NVME_CTRLR_STATE_READ_VS:
    4008          21 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READ_VS_WAIT_FOR_VS, NVME_TIMEOUT_INFINITE);
    4009          21 :                 rc = nvme_ctrlr_get_vs_async(ctrlr, nvme_ctrlr_process_init_vs_done, ctrlr);
    4010          21 :                 break;
    4011             : 
    4012          21 :         case NVME_CTRLR_STATE_READ_CAP:
    4013          21 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READ_CAP_WAIT_FOR_CAP, NVME_TIMEOUT_INFINITE);
    4014          21 :                 rc = nvme_ctrlr_get_cap_async(ctrlr, nvme_ctrlr_process_init_cap_done, ctrlr);
    4015          21 :                 break;
    4016             : 
    4017          22 :         case NVME_CTRLR_STATE_CHECK_EN:
    4018             :                 /* Begin the hardware initialization by making sure the controller is disabled. */
    4019          22 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CHECK_EN_WAIT_FOR_CC, ready_timeout_in_ms);
    4020          22 :                 rc = nvme_ctrlr_get_cc_async(ctrlr, nvme_ctrlr_process_init_check_en, ctrlr);
    4021          22 :                 break;
    4022             : 
    4023           2 :         case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1:
    4024             :                 /*
    4025             :                  * Controller is currently enabled. We need to disable it to cause a reset.
    4026             :                  *
    4027             :                  * If CC.EN = 1 && CSTS.RDY = 0, the controller is in the process of becoming ready.
    4028             :                  *  Wait for the ready bit to be 1 before disabling the controller.
    4029             :                  */
    4030           2 :                 nvme_ctrlr_set_state_quiet(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS,
    4031             :                                            NVME_TIMEOUT_KEEP_EXISTING);
    4032           2 :                 rc = nvme_ctrlr_get_csts_async(ctrlr, nvme_ctrlr_process_init_wait_for_ready_1, ctrlr);
    4033           2 :                 break;
    4034             : 
    4035           2 :         case NVME_CTRLR_STATE_SET_EN_0:
    4036           2 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Setting CC.EN = 0\n");
    4037           2 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_EN_0_WAIT_FOR_CC, ready_timeout_in_ms);
    4038           2 :                 rc = nvme_ctrlr_get_cc_async(ctrlr, nvme_ctrlr_process_init_set_en_0_read_cc, ctrlr);
    4039           2 :                 break;
    4040             : 
    4041          22 :         case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0:
    4042          22 :                 nvme_ctrlr_set_state_quiet(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0_WAIT_FOR_CSTS,
    4043             :                                            NVME_TIMEOUT_KEEP_EXISTING);
    4044          22 :                 rc = nvme_ctrlr_get_csts_async(ctrlr, nvme_ctrlr_process_init_wait_for_ready_0, ctrlr);
    4045          22 :                 break;
    4046             : 
    4047          21 :         case NVME_CTRLR_STATE_DISABLED:
    4048          21 :                 if (ctrlr->is_disconnecting) {
    4049           0 :                         NVME_CTRLR_DEBUGLOG(ctrlr, "Ctrlr was disabled.\n");
    4050             :                 } else {
    4051          21 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE, ready_timeout_in_ms);
    4052             : 
    4053             :                         /*
    4054             :                          * Delay 100us before setting CC.EN = 1.  Some NVMe SSDs miss CC.EN getting
    4055             :                          *  set to 1 if it is too soon after CSTS.RDY is reported as 0.
    4056             :                          */
    4057          21 :                         spdk_delay_us(100);
    4058             :                 }
    4059          21 :                 break;
    4060             : 
    4061          21 :         case NVME_CTRLR_STATE_ENABLE:
    4062          21 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Setting CC.EN = 1\n");
    4063          21 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE_WAIT_FOR_CC, ready_timeout_in_ms);
    4064          21 :                 rc = nvme_ctrlr_enable(ctrlr);
    4065          21 :                 if (rc) {
    4066           7 :                         NVME_CTRLR_ERRLOG(ctrlr, "Ctrlr enable failed with error: %d", rc);
    4067             :                 }
    4068          21 :                 return rc;
    4069             : 
    4070           9 :         case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1:
    4071           9 :                 nvme_ctrlr_set_state_quiet(ctrlr, NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS,
    4072             :                                            NVME_TIMEOUT_KEEP_EXISTING);
    4073           9 :                 rc = nvme_ctrlr_get_csts_async(ctrlr, nvme_ctrlr_process_init_enable_wait_for_ready_1,
    4074             :                                                ctrlr);
    4075           9 :                 break;
    4076             : 
    4077           9 :         case NVME_CTRLR_STATE_RESET_ADMIN_QUEUE:
    4078           9 :                 nvme_transport_qpair_reset(ctrlr->adminq);
    4079           9 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY, NVME_TIMEOUT_INFINITE);
    4080           9 :                 break;
    4081             : 
    4082          16 :         case NVME_CTRLR_STATE_IDENTIFY:
    4083          16 :                 rc = nvme_ctrlr_identify(ctrlr);
    4084          16 :                 break;
    4085             : 
    4086          19 :         case NVME_CTRLR_STATE_CONFIGURE_AER:
    4087          19 :                 rc = nvme_ctrlr_configure_aer(ctrlr);
    4088          19 :                 break;
    4089             : 
    4090          22 :         case NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT:
    4091          22 :                 rc = nvme_ctrlr_set_keep_alive_timeout(ctrlr);
    4092          22 :                 break;
    4093             : 
    4094          19 :         case NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC:
    4095          19 :                 rc = nvme_ctrlr_identify_iocs_specific(ctrlr);
    4096          19 :                 break;
    4097             : 
    4098           0 :         case NVME_CTRLR_STATE_GET_ZNS_CMD_EFFECTS_LOG:
    4099           0 :                 rc = nvme_ctrlr_get_zns_cmd_and_effects_log(ctrlr);
    4100           0 :                 break;
    4101             : 
    4102          19 :         case NVME_CTRLR_STATE_SET_NUM_QUEUES:
    4103          19 :                 nvme_ctrlr_update_nvmf_ioccsz(ctrlr);
    4104          19 :                 rc = nvme_ctrlr_set_num_queues(ctrlr);
    4105          19 :                 break;
    4106             : 
    4107          24 :         case NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS:
    4108          24 :                 _nvme_ctrlr_identify_active_ns(ctrlr);
    4109          24 :                 break;
    4110             : 
    4111          14 :         case NVME_CTRLR_STATE_IDENTIFY_NS:
    4112          14 :                 rc = nvme_ctrlr_identify_namespaces(ctrlr);
    4113          14 :                 break;
    4114             : 
    4115          14 :         case NVME_CTRLR_STATE_IDENTIFY_ID_DESCS:
    4116          14 :                 rc = nvme_ctrlr_identify_id_desc_namespaces(ctrlr);
    4117          14 :                 break;
    4118             : 
    4119          14 :         case NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC:
    4120          14 :                 rc = nvme_ctrlr_identify_namespaces_iocs_specific(ctrlr);
    4121          14 :                 break;
    4122             : 
    4123          15 :         case NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES:
    4124          15 :                 rc = nvme_ctrlr_set_supported_log_pages(ctrlr);
    4125          15 :                 break;
    4126             : 
    4127           1 :         case NVME_CTRLR_STATE_SET_SUPPORTED_INTEL_LOG_PAGES:
    4128           1 :                 rc = nvme_ctrlr_set_intel_support_log_pages(ctrlr);
    4129           1 :                 break;
    4130             : 
    4131          14 :         case NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES:
    4132          14 :                 nvme_ctrlr_set_supported_features(ctrlr);
    4133          14 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_FEATURE,
    4134          14 :                                      ctrlr->opts.admin_timeout_ms);
    4135          14 :                 break;
    4136             : 
    4137          16 :         case NVME_CTRLR_STATE_SET_HOST_FEATURE:
    4138          16 :                 rc = nvme_ctrlr_set_host_feature(ctrlr);
    4139          16 :                 break;
    4140             : 
    4141          14 :         case NVME_CTRLR_STATE_SET_DB_BUF_CFG:
    4142          14 :                 rc = nvme_ctrlr_set_doorbell_buffer_config(ctrlr);
    4143          14 :                 break;
    4144             : 
    4145          14 :         case NVME_CTRLR_STATE_SET_HOST_ID:
    4146          14 :                 rc = nvme_ctrlr_set_host_id(ctrlr);
    4147          14 :                 break;
    4148             : 
    4149          17 :         case NVME_CTRLR_STATE_TRANSPORT_READY:
    4150          17 :                 rc = nvme_transport_ctrlr_ready(ctrlr);
    4151          17 :                 if (rc) {
    4152           1 :                         NVME_CTRLR_ERRLOG(ctrlr, "Transport controller ready step failed: rc %d\n", rc);
    4153           1 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE);
    4154             :                 } else {
    4155          16 :                         nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE);
    4156             :                 }
    4157          17 :                 break;
    4158             : 
    4159           0 :         case NVME_CTRLR_STATE_READY:
    4160           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Ctrlr already in ready state\n");
    4161           0 :                 return 0;
    4162             : 
    4163           0 :         case NVME_CTRLR_STATE_ERROR:
    4164           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Ctrlr is in error state\n");
    4165           0 :                 return -1;
    4166             : 
    4167           0 :         case NVME_CTRLR_STATE_READ_VS_WAIT_FOR_VS:
    4168             :         case NVME_CTRLR_STATE_READ_CAP_WAIT_FOR_CAP:
    4169             :         case NVME_CTRLR_STATE_CHECK_EN_WAIT_FOR_CC:
    4170             :         case NVME_CTRLR_STATE_SET_EN_0_WAIT_FOR_CC:
    4171             :         case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS:
    4172             :         case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0_WAIT_FOR_CSTS:
    4173             :         case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_CC:
    4174             :         case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS:
    4175             :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY:
    4176             :         case NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER:
    4177             :         case NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT:
    4178             :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_IOCS_SPECIFIC:
    4179             :         case NVME_CTRLR_STATE_WAIT_FOR_GET_ZNS_CMD_EFFECTS_LOG:
    4180             :         case NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES:
    4181             :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS:
    4182             :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS:
    4183             :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS:
    4184             :         case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS_IOCS_SPECIFIC:
    4185             :         case NVME_CTRLR_STATE_WAIT_FOR_SUPPORTED_INTEL_LOG_PAGES:
    4186             :         case NVME_CTRLR_STATE_WAIT_FOR_SET_HOST_FEATURE:
    4187             :         case NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG:
    4188             :         case NVME_CTRLR_STATE_WAIT_FOR_HOST_ID:
    4189             :                 /*
    4190             :                  * nvme_ctrlr_process_init() may be called from the completion context
    4191             :                  * for the admin qpair. Avoid recursive calls for this case.
    4192             :                  */
    4193           0 :                 if (!ctrlr->adminq->in_completion_context) {
    4194           0 :                         spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
    4195             :                 }
    4196           0 :                 break;
    4197             : 
    4198           0 :         default:
    4199           0 :                 assert(0);
    4200             :                 return -1;
    4201             :         }
    4202             : 
    4203         424 :         if (rc) {
    4204           1 :                 NVME_CTRLR_ERRLOG(ctrlr, "Ctrlr operation failed with error: %d, ctrlr state: %d (%s)\n",
    4205             :                                   rc, ctrlr->state, nvme_ctrlr_state_string(ctrlr->state));
    4206             :         }
    4207             : 
    4208             :         /* Note: we use the ticks captured when we entered this function.
    4209             :          * This covers environments where the SPDK process gets swapped out after
    4210             :          * we tried to advance the state but before we check the timeout here.
    4211             :          * It is not normal for this to happen, but harmless to handle it in this
    4212             :          * way.
    4213             :          */
    4214         424 :         if (ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE &&
    4215           0 :             ticks > ctrlr->state_timeout_tsc) {
    4216           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Initialization timed out in state %d (%s)\n",
    4217             :                                   ctrlr->state, nvme_ctrlr_state_string(ctrlr->state));
    4218           0 :                 return -1;
    4219             :         }
    4220             : 
    4221         424 :         return rc;
    4222             : }
    4223             : 
    4224             : int
    4225          47 : nvme_robust_mutex_init_recursive_shared(pthread_mutex_t *mtx)
    4226             : {
    4227          47 :         pthread_mutexattr_t attr;
    4228          47 :         int rc = 0;
    4229             : 
    4230          47 :         if (pthread_mutexattr_init(&attr)) {
    4231           0 :                 return -1;
    4232             :         }
    4233          94 :         if (pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE) ||
    4234             : #ifndef __FreeBSD__
    4235          94 :             pthread_mutexattr_setrobust(&attr, PTHREAD_MUTEX_ROBUST) ||
    4236          94 :             pthread_mutexattr_setpshared(&attr, PTHREAD_PROCESS_SHARED) ||
    4237             : #endif
    4238          47 :             pthread_mutex_init(mtx, &attr)) {
    4239           0 :                 rc = -1;
    4240             :         }
    4241          47 :         pthread_mutexattr_destroy(&attr);
    4242          47 :         return rc;
    4243             : }
    4244             : 
    4245             : int
    4246          47 : nvme_ctrlr_construct(struct spdk_nvme_ctrlr *ctrlr)
    4247             : {
    4248             :         int rc;
    4249             : 
    4250          47 :         if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) {
    4251           1 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT_DELAY, NVME_TIMEOUT_INFINITE);
    4252             :         } else {
    4253          46 :                 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, NVME_TIMEOUT_INFINITE);
    4254             :         }
    4255             : 
    4256          47 :         if (ctrlr->opts.admin_queue_size > SPDK_NVME_ADMIN_QUEUE_MAX_ENTRIES) {
    4257           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "admin_queue_size %u exceeds max defined by NVMe spec, use max value\n",
    4258             :                                   ctrlr->opts.admin_queue_size);
    4259           0 :                 ctrlr->opts.admin_queue_size = SPDK_NVME_ADMIN_QUEUE_MAX_ENTRIES;
    4260             :         }
    4261             : 
    4262          47 :         if (ctrlr->quirks & NVME_QUIRK_MINIMUM_ADMIN_QUEUE_SIZE &&
    4263           0 :             (ctrlr->opts.admin_queue_size % SPDK_NVME_ADMIN_QUEUE_QUIRK_ENTRIES_MULTIPLE) != 0) {
    4264           0 :                 NVME_CTRLR_ERRLOG(ctrlr,
    4265             :                                   "admin_queue_size %u is invalid for this NVMe device, adjust to next multiple\n",
    4266             :                                   ctrlr->opts.admin_queue_size);
    4267           0 :                 ctrlr->opts.admin_queue_size = SPDK_ALIGN_CEIL(ctrlr->opts.admin_queue_size,
    4268             :                                                SPDK_NVME_ADMIN_QUEUE_QUIRK_ENTRIES_MULTIPLE);
    4269             :         }
    4270             : 
    4271          47 :         if (ctrlr->opts.admin_queue_size < SPDK_NVME_ADMIN_QUEUE_MIN_ENTRIES) {
    4272          26 :                 NVME_CTRLR_ERRLOG(ctrlr,
    4273             :                                   "admin_queue_size %u is less than minimum defined by NVMe spec, use min value\n",
    4274             :                                   ctrlr->opts.admin_queue_size);
    4275          26 :                 ctrlr->opts.admin_queue_size = SPDK_NVME_ADMIN_QUEUE_MIN_ENTRIES;
    4276             :         }
    4277             : 
    4278          47 :         ctrlr->flags = 0;
    4279          47 :         ctrlr->free_io_qids = NULL;
    4280          47 :         ctrlr->is_resetting = false;
    4281          47 :         ctrlr->is_failed = false;
    4282          47 :         ctrlr->is_destructed = false;
    4283             : 
    4284          47 :         TAILQ_INIT(&ctrlr->active_io_qpairs);
    4285          47 :         STAILQ_INIT(&ctrlr->queued_aborts);
    4286          47 :         ctrlr->outstanding_aborts = 0;
    4287             : 
    4288          47 :         ctrlr->ana_log_page = NULL;
    4289          47 :         ctrlr->ana_log_page_size = 0;
    4290             : 
    4291          47 :         rc = nvme_robust_mutex_init_recursive_shared(&ctrlr->ctrlr_lock);
    4292          47 :         if (rc != 0) {
    4293           0 :                 return rc;
    4294             :         }
    4295             : 
    4296          47 :         TAILQ_INIT(&ctrlr->active_procs);
    4297          47 :         STAILQ_INIT(&ctrlr->register_operations);
    4298             : 
    4299          47 :         RB_INIT(&ctrlr->ns);
    4300             : 
    4301          47 :         return rc;
    4302             : }
    4303             : 
    4304             : static void
    4305          21 : nvme_ctrlr_init_cap(struct spdk_nvme_ctrlr *ctrlr)
    4306             : {
    4307          21 :         if (ctrlr->cap.bits.ams & SPDK_NVME_CAP_AMS_WRR) {
    4308           5 :                 ctrlr->flags |= SPDK_NVME_CTRLR_WRR_SUPPORTED;
    4309             :         }
    4310             : 
    4311          21 :         ctrlr->min_page_size = 1u << (12 + ctrlr->cap.bits.mpsmin);
    4312             : 
    4313             :         /* For now, always select page_size == min_page_size. */
    4314          21 :         ctrlr->page_size = ctrlr->min_page_size;
    4315             : 
    4316          21 :         ctrlr->opts.io_queue_size = spdk_max(ctrlr->opts.io_queue_size, SPDK_NVME_IO_QUEUE_MIN_ENTRIES);
    4317          21 :         ctrlr->opts.io_queue_size = spdk_min(ctrlr->opts.io_queue_size, MAX_IO_QUEUE_ENTRIES);
    4318          21 :         if (ctrlr->quirks & NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE &&
    4319           0 :             ctrlr->opts.io_queue_size == DEFAULT_IO_QUEUE_SIZE) {
    4320             :                 /* If the user specifically set an IO queue size different than the
    4321             :                  * default, use that value.  Otherwise overwrite with the quirked value.
    4322             :                  * This allows this quirk to be overridden when necessary.
    4323             :                  * However, cap.mqes still needs to be respected.
    4324             :                  */
    4325           0 :                 ctrlr->opts.io_queue_size = DEFAULT_IO_QUEUE_SIZE_FOR_QUIRK;
    4326             :         }
    4327          21 :         ctrlr->opts.io_queue_size = spdk_min(ctrlr->opts.io_queue_size, ctrlr->cap.bits.mqes + 1u);
    4328             : 
    4329          21 :         ctrlr->opts.io_queue_requests = spdk_max(ctrlr->opts.io_queue_requests, ctrlr->opts.io_queue_size);
    4330          21 : }
    4331             : 
    4332             : void
    4333          47 : nvme_ctrlr_destruct_finish(struct spdk_nvme_ctrlr *ctrlr)
    4334             : {
    4335             :         int rc;
    4336             : 
    4337          47 :         if (ctrlr->lock_depth > 0) {
    4338           0 :                 SPDK_ERRLOG("lock currently held (depth=%d)!\n", ctrlr->lock_depth);
    4339           0 :                 assert(false);
    4340             :         }
    4341             : 
    4342          47 :         rc = pthread_mutex_destroy(&ctrlr->ctrlr_lock);
    4343          47 :         if (rc) {
    4344           0 :                 SPDK_ERRLOG("could not destroy ctrlr_lock: %s\n", spdk_strerror(rc));
    4345           0 :                 assert(false);
    4346             :         }
    4347             : 
    4348          47 :         nvme_ctrlr_free_processes(ctrlr);
    4349          47 : }
    4350             : 
    4351             : void
    4352          47 : nvme_ctrlr_destruct_async(struct spdk_nvme_ctrlr *ctrlr,
    4353             :                           struct nvme_ctrlr_detach_ctx *ctx)
    4354             : {
    4355             :         struct spdk_nvme_qpair *qpair, *tmp;
    4356             : 
    4357          47 :         NVME_CTRLR_DEBUGLOG(ctrlr, "Prepare to destruct SSD\n");
    4358             : 
    4359          47 :         ctrlr->prepare_for_reset = false;
    4360          47 :         ctrlr->is_destructed = true;
    4361             : 
    4362          47 :         spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
    4363             : 
    4364          47 :         nvme_ctrlr_abort_queued_aborts(ctrlr);
    4365          47 :         nvme_transport_admin_qpair_abort_aers(ctrlr->adminq);
    4366             : 
    4367          47 :         TAILQ_FOREACH_SAFE(qpair, &ctrlr->active_io_qpairs, tailq, tmp) {
    4368           0 :                 spdk_nvme_ctrlr_free_io_qpair(qpair);
    4369             :         }
    4370             : 
    4371          47 :         nvme_ctrlr_free_doorbell_buffer(ctrlr);
    4372          47 :         nvme_ctrlr_free_iocs_specific_data(ctrlr);
    4373             : 
    4374          47 :         nvme_ctrlr_shutdown_async(ctrlr, ctx);
    4375          47 : }
    4376             : 
    4377             : int
    4378          86 : nvme_ctrlr_destruct_poll_async(struct spdk_nvme_ctrlr *ctrlr,
    4379             :                                struct nvme_ctrlr_detach_ctx *ctx)
    4380             : {
    4381             :         struct spdk_nvme_ns *ns, *tmp_ns;
    4382          86 :         int rc = 0;
    4383             : 
    4384          86 :         if (!ctx->shutdown_complete) {
    4385          78 :                 rc = nvme_ctrlr_shutdown_poll_async(ctrlr, ctx);
    4386          78 :                 if (rc == -EAGAIN) {
    4387          39 :                         return -EAGAIN;
    4388             :                 }
    4389             :                 /* Destruct ctrlr forcefully for any other error. */
    4390             :         }
    4391             : 
    4392          47 :         if (ctx->cb_fn) {
    4393           0 :                 ctx->cb_fn(ctrlr);
    4394             :         }
    4395             : 
    4396          47 :         nvme_transport_ctrlr_disconnect_qpair(ctrlr, ctrlr->adminq);
    4397             : 
    4398        7733 :         RB_FOREACH_SAFE(ns, nvme_ns_tree, &ctrlr->ns, tmp_ns) {
    4399        7686 :                 nvme_ctrlr_destruct_namespace(ctrlr, ns->id);
    4400        7686 :                 RB_REMOVE(nvme_ns_tree, &ctrlr->ns, ns);
    4401        7686 :                 spdk_free(ns);
    4402             :         }
    4403             : 
    4404          47 :         ctrlr->active_ns_count = 0;
    4405             : 
    4406          47 :         spdk_bit_array_free(&ctrlr->free_io_qids);
    4407             : 
    4408          47 :         free(ctrlr->ana_log_page);
    4409          47 :         free(ctrlr->copied_ana_desc);
    4410          47 :         ctrlr->ana_log_page = NULL;
    4411          47 :         ctrlr->copied_ana_desc = NULL;
    4412          47 :         ctrlr->ana_log_page_size = 0;
    4413             : 
    4414          47 :         nvme_transport_ctrlr_destruct(ctrlr);
    4415             : 
    4416          47 :         return rc;
    4417             : }
    4418             : 
    4419             : void
    4420          47 : nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr)
    4421             : {
    4422          47 :         struct nvme_ctrlr_detach_ctx ctx = { .ctrlr = ctrlr };
    4423             :         int rc;
    4424             : 
    4425          47 :         nvme_ctrlr_destruct_async(ctrlr, &ctx);
    4426             : 
    4427             :         while (1) {
    4428          86 :                 rc = nvme_ctrlr_destruct_poll_async(ctrlr, &ctx);
    4429          86 :                 if (rc != -EAGAIN) {
    4430          47 :                         break;
    4431             :                 }
    4432          39 :                 nvme_delay(1000);
    4433             :         }
    4434          47 : }
    4435             : 
    4436             : int
    4437          24 : nvme_ctrlr_submit_admin_request(struct spdk_nvme_ctrlr *ctrlr,
    4438             :                                 struct nvme_request *req)
    4439             : {
    4440          24 :         return nvme_qpair_submit_request(ctrlr->adminq, req);
    4441             : }
    4442             : 
    4443             : static void
    4444           0 : nvme_keep_alive_completion(void *cb_ctx, const struct spdk_nvme_cpl *cpl)
    4445             : {
    4446             :         /* Do nothing */
    4447           0 : }
    4448             : 
    4449             : /*
    4450             :  * Check if we need to send a Keep Alive command.
    4451             :  * Caller must hold ctrlr->ctrlr_lock.
    4452             :  */
    4453             : static int
    4454           0 : nvme_ctrlr_keep_alive(struct spdk_nvme_ctrlr *ctrlr)
    4455             : {
    4456             :         uint64_t now;
    4457             :         struct nvme_request *req;
    4458             :         struct spdk_nvme_cmd *cmd;
    4459           0 :         int rc = 0;
    4460             : 
    4461           0 :         now = spdk_get_ticks();
    4462           0 :         if (now < ctrlr->next_keep_alive_tick) {
    4463           0 :                 return rc;
    4464             :         }
    4465             : 
    4466           0 :         req = nvme_allocate_request_null(ctrlr->adminq, nvme_keep_alive_completion, NULL);
    4467           0 :         if (req == NULL) {
    4468           0 :                 return rc;
    4469             :         }
    4470             : 
    4471           0 :         cmd = &req->cmd;
    4472           0 :         cmd->opc = SPDK_NVME_OPC_KEEP_ALIVE;
    4473             : 
    4474           0 :         rc = nvme_ctrlr_submit_admin_request(ctrlr, req);
    4475           0 :         if (rc != 0) {
    4476           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Submitting Keep Alive failed\n");
    4477           0 :                 rc = -ENXIO;
    4478             :         }
    4479             : 
    4480           0 :         ctrlr->next_keep_alive_tick = now + ctrlr->keep_alive_interval_ticks;
    4481           0 :         return rc;
    4482             : }
    4483             : 
    4484             : int32_t
    4485           1 : spdk_nvme_ctrlr_process_admin_completions(struct spdk_nvme_ctrlr *ctrlr)
    4486             : {
    4487             :         int32_t num_completions;
    4488             :         int32_t rc;
    4489             :         struct spdk_nvme_ctrlr_process  *active_proc;
    4490             : 
    4491           1 :         nvme_ctrlr_lock(ctrlr);
    4492             : 
    4493           1 :         if (ctrlr->keep_alive_interval_ticks) {
    4494           0 :                 rc = nvme_ctrlr_keep_alive(ctrlr);
    4495           0 :                 if (rc) {
    4496           0 :                         nvme_ctrlr_unlock(ctrlr);
    4497           0 :                         return rc;
    4498             :                 }
    4499             :         }
    4500             : 
    4501           1 :         rc = nvme_io_msg_process(ctrlr);
    4502           1 :         if (rc < 0) {
    4503           0 :                 nvme_ctrlr_unlock(ctrlr);
    4504           0 :                 return rc;
    4505             :         }
    4506           1 :         num_completions = rc;
    4507             : 
    4508           1 :         rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
    4509             : 
    4510             :         /* Each process has an async list, complete the ones for this process object */
    4511           1 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
    4512           1 :         if (active_proc) {
    4513           0 :                 nvme_ctrlr_complete_queued_async_events(ctrlr);
    4514             :         }
    4515             : 
    4516           1 :         if (rc == -ENXIO && ctrlr->is_disconnecting) {
    4517           1 :                 nvme_ctrlr_disconnect_done(ctrlr);
    4518             :         }
    4519             : 
    4520           1 :         nvme_ctrlr_unlock(ctrlr);
    4521             : 
    4522           1 :         if (rc < 0) {
    4523           1 :                 num_completions = rc;
    4524             :         } else {
    4525           0 :                 num_completions += rc;
    4526             :         }
    4527             : 
    4528           1 :         return num_completions;
    4529             : }
    4530             : 
    4531             : const struct spdk_nvme_ctrlr_data *
    4532           0 : spdk_nvme_ctrlr_get_data(struct spdk_nvme_ctrlr *ctrlr)
    4533             : {
    4534           0 :         return &ctrlr->cdata;
    4535             : }
    4536             : 
    4537           0 : union spdk_nvme_csts_register spdk_nvme_ctrlr_get_regs_csts(struct spdk_nvme_ctrlr *ctrlr)
    4538             : {
    4539           0 :         union spdk_nvme_csts_register csts;
    4540             : 
    4541           0 :         if (nvme_ctrlr_get_csts(ctrlr, &csts)) {
    4542           0 :                 csts.raw = SPDK_NVME_INVALID_REGISTER_VALUE;
    4543             :         }
    4544           0 :         return csts;
    4545             : }
    4546             : 
    4547           0 : union spdk_nvme_cc_register spdk_nvme_ctrlr_get_regs_cc(struct spdk_nvme_ctrlr *ctrlr)
    4548             : {
    4549           0 :         union spdk_nvme_cc_register cc;
    4550             : 
    4551           0 :         if (nvme_ctrlr_get_cc(ctrlr, &cc)) {
    4552           0 :                 cc.raw = SPDK_NVME_INVALID_REGISTER_VALUE;
    4553             :         }
    4554           0 :         return cc;
    4555             : }
    4556             : 
    4557           0 : union spdk_nvme_cap_register spdk_nvme_ctrlr_get_regs_cap(struct spdk_nvme_ctrlr *ctrlr)
    4558             : {
    4559           0 :         return ctrlr->cap;
    4560             : }
    4561             : 
    4562           0 : union spdk_nvme_vs_register spdk_nvme_ctrlr_get_regs_vs(struct spdk_nvme_ctrlr *ctrlr)
    4563             : {
    4564           0 :         return ctrlr->vs;
    4565             : }
    4566             : 
    4567           0 : union spdk_nvme_cmbsz_register spdk_nvme_ctrlr_get_regs_cmbsz(struct spdk_nvme_ctrlr *ctrlr)
    4568             : {
    4569           0 :         union spdk_nvme_cmbsz_register cmbsz;
    4570             : 
    4571           0 :         if (nvme_ctrlr_get_cmbsz(ctrlr, &cmbsz)) {
    4572           0 :                 cmbsz.raw = 0;
    4573             :         }
    4574             : 
    4575           0 :         return cmbsz;
    4576             : }
    4577             : 
    4578           0 : union spdk_nvme_pmrcap_register spdk_nvme_ctrlr_get_regs_pmrcap(struct spdk_nvme_ctrlr *ctrlr)
    4579             : {
    4580           0 :         union spdk_nvme_pmrcap_register pmrcap;
    4581             : 
    4582           0 :         if (nvme_ctrlr_get_pmrcap(ctrlr, &pmrcap)) {
    4583           0 :                 pmrcap.raw = 0;
    4584             :         }
    4585             : 
    4586           0 :         return pmrcap;
    4587             : }
    4588             : 
    4589           0 : union spdk_nvme_bpinfo_register spdk_nvme_ctrlr_get_regs_bpinfo(struct spdk_nvme_ctrlr *ctrlr)
    4590             : {
    4591           0 :         union spdk_nvme_bpinfo_register bpinfo;
    4592             : 
    4593           0 :         if (nvme_ctrlr_get_bpinfo(ctrlr, &bpinfo)) {
    4594           0 :                 bpinfo.raw = 0;
    4595             :         }
    4596             : 
    4597           0 :         return bpinfo;
    4598             : }
    4599             : 
    4600             : uint64_t
    4601           0 : spdk_nvme_ctrlr_get_pmrsz(struct spdk_nvme_ctrlr *ctrlr)
    4602             : {
    4603           0 :         return ctrlr->pmr_size;
    4604             : }
    4605             : 
    4606             : uint32_t
    4607           2 : spdk_nvme_ctrlr_get_num_ns(struct spdk_nvme_ctrlr *ctrlr)
    4608             : {
    4609           2 :         return ctrlr->cdata.nn;
    4610             : }
    4611             : 
    4612             : bool
    4613        9301 : spdk_nvme_ctrlr_is_active_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid)
    4614             : {
    4615        9301 :         struct spdk_nvme_ns tmp, *ns;
    4616             : 
    4617        9301 :         tmp.id = nsid;
    4618        9301 :         ns = RB_FIND(nvme_ns_tree, &ctrlr->ns, &tmp);
    4619             : 
    4620        9301 :         if (ns != NULL) {
    4621        9209 :                 return ns->active;
    4622             :         }
    4623             : 
    4624          92 :         return false;
    4625             : }
    4626             : 
    4627             : uint32_t
    4628          35 : spdk_nvme_ctrlr_get_first_active_ns(struct spdk_nvme_ctrlr *ctrlr)
    4629             : {
    4630             :         struct spdk_nvme_ns *ns;
    4631             : 
    4632          35 :         ns = RB_MIN(nvme_ns_tree, &ctrlr->ns);
    4633          35 :         if (ns == NULL) {
    4634          10 :                 return 0;
    4635             :         }
    4636             : 
    4637        4618 :         while (ns != NULL) {
    4638        4615 :                 if (ns->active) {
    4639          22 :                         return ns->id;
    4640             :                 }
    4641             : 
    4642        4593 :                 ns = RB_NEXT(nvme_ns_tree, &ctrlr->ns, ns);
    4643             :         }
    4644             : 
    4645           3 :         return 0;
    4646             : }
    4647             : 
    4648             : uint32_t
    4649        4657 : spdk_nvme_ctrlr_get_next_active_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t prev_nsid)
    4650             : {
    4651        4657 :         struct spdk_nvme_ns tmp, *ns;
    4652             : 
    4653        4657 :         tmp.id = prev_nsid;
    4654        4657 :         ns = RB_FIND(nvme_ns_tree, &ctrlr->ns, &tmp);
    4655        4657 :         if (ns == NULL) {
    4656           5 :                 return 0;
    4657             :         }
    4658             : 
    4659        4652 :         ns = RB_NEXT(nvme_ns_tree, &ctrlr->ns, ns);
    4660        6184 :         while (ns != NULL) {
    4661        6164 :                 if (ns->active) {
    4662        4632 :                         return ns->id;
    4663             :                 }
    4664             : 
    4665        1532 :                 ns = RB_NEXT(nvme_ns_tree, &ctrlr->ns, ns);
    4666             :         }
    4667             : 
    4668          20 :         return 0;
    4669             : }
    4670             : 
    4671             : struct spdk_nvme_ns *
    4672       12403 : spdk_nvme_ctrlr_get_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid)
    4673             : {
    4674       12403 :         struct spdk_nvme_ns tmp;
    4675             :         struct spdk_nvme_ns *ns;
    4676             : 
    4677       12403 :         if (nsid < 1 || nsid > ctrlr->cdata.nn) {
    4678          18 :                 return NULL;
    4679             :         }
    4680             : 
    4681       12385 :         nvme_ctrlr_lock(ctrlr);
    4682             : 
    4683       12385 :         tmp.id = nsid;
    4684       12385 :         ns = RB_FIND(nvme_ns_tree, &ctrlr->ns, &tmp);
    4685             : 
    4686       12385 :         if (ns == NULL) {
    4687        7687 :                 ns = spdk_zmalloc(sizeof(struct spdk_nvme_ns), 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE);
    4688        7687 :                 if (ns == NULL) {
    4689           0 :                         nvme_ctrlr_unlock(ctrlr);
    4690           0 :                         return NULL;
    4691             :                 }
    4692             : 
    4693        7687 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Namespace %u was added\n", nsid);
    4694        7687 :                 ns->id = nsid;
    4695        7687 :                 RB_INSERT(nvme_ns_tree, &ctrlr->ns, ns);
    4696             :         }
    4697             : 
    4698       12385 :         nvme_ctrlr_unlock(ctrlr);
    4699             : 
    4700       12385 :         return ns;
    4701             : }
    4702             : 
    4703             : struct spdk_pci_device *
    4704           0 : spdk_nvme_ctrlr_get_pci_device(struct spdk_nvme_ctrlr *ctrlr)
    4705             : {
    4706           0 :         if (ctrlr == NULL) {
    4707           0 :                 return NULL;
    4708             :         }
    4709             : 
    4710           0 :         if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) {
    4711           0 :                 return NULL;
    4712             :         }
    4713             : 
    4714           0 :         return nvme_ctrlr_proc_get_devhandle(ctrlr);
    4715             : }
    4716             : 
    4717             : uint32_t
    4718           0 : spdk_nvme_ctrlr_get_max_xfer_size(const struct spdk_nvme_ctrlr *ctrlr)
    4719             : {
    4720           0 :         return ctrlr->max_xfer_size;
    4721             : }
    4722             : 
    4723             : uint16_t
    4724           0 : spdk_nvme_ctrlr_get_max_sges(const struct spdk_nvme_ctrlr *ctrlr)
    4725             : {
    4726           0 :         if (ctrlr->flags & SPDK_NVME_CTRLR_SGL_SUPPORTED) {
    4727           0 :                 return ctrlr->max_sges;
    4728             :         } else {
    4729           0 :                 return UINT16_MAX;
    4730             :         }
    4731             : }
    4732             : 
    4733             : void
    4734           2 : spdk_nvme_ctrlr_register_aer_callback(struct spdk_nvme_ctrlr *ctrlr,
    4735             :                                       spdk_nvme_aer_cb aer_cb_fn,
    4736             :                                       void *aer_cb_arg)
    4737             : {
    4738             :         struct spdk_nvme_ctrlr_process *active_proc;
    4739             : 
    4740           2 :         nvme_ctrlr_lock(ctrlr);
    4741             : 
    4742           2 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
    4743           2 :         if (active_proc) {
    4744           2 :                 active_proc->aer_cb_fn = aer_cb_fn;
    4745           2 :                 active_proc->aer_cb_arg = aer_cb_arg;
    4746             :         }
    4747             : 
    4748           2 :         nvme_ctrlr_unlock(ctrlr);
    4749           2 : }
    4750             : 
    4751             : void
    4752           0 : spdk_nvme_ctrlr_disable_read_changed_ns_list_log_page(struct spdk_nvme_ctrlr *ctrlr)
    4753             : {
    4754           0 :         ctrlr->opts.disable_read_changed_ns_list_log_page = true;
    4755           0 : }
    4756             : 
    4757             : void
    4758           0 : spdk_nvme_ctrlr_register_timeout_callback(struct spdk_nvme_ctrlr *ctrlr,
    4759             :                 uint64_t timeout_io_us, uint64_t timeout_admin_us,
    4760             :                 spdk_nvme_timeout_cb cb_fn, void *cb_arg)
    4761             : {
    4762             :         struct spdk_nvme_ctrlr_process  *active_proc;
    4763             : 
    4764           0 :         nvme_ctrlr_lock(ctrlr);
    4765             : 
    4766           0 :         active_proc = nvme_ctrlr_get_current_process(ctrlr);
    4767           0 :         if (active_proc) {
    4768           0 :                 active_proc->timeout_io_ticks = timeout_io_us * spdk_get_ticks_hz() / 1000000ULL;
    4769           0 :                 active_proc->timeout_admin_ticks = timeout_admin_us * spdk_get_ticks_hz() / 1000000ULL;
    4770           0 :                 active_proc->timeout_cb_fn = cb_fn;
    4771           0 :                 active_proc->timeout_cb_arg = cb_arg;
    4772             :         }
    4773             : 
    4774           0 :         ctrlr->timeout_enabled = true;
    4775             : 
    4776           0 :         nvme_ctrlr_unlock(ctrlr);
    4777           0 : }
    4778             : 
    4779             : bool
    4780           8 : spdk_nvme_ctrlr_is_log_page_supported(struct spdk_nvme_ctrlr *ctrlr, uint8_t log_page)
    4781             : {
    4782             :         /* No bounds check necessary, since log_page is uint8_t and log_page_supported has 256 entries */
    4783             :         SPDK_STATIC_ASSERT(sizeof(ctrlr->log_page_supported) == 256, "log_page_supported size mismatch");
    4784           8 :         return ctrlr->log_page_supported[log_page];
    4785             : }
    4786             : 
    4787             : bool
    4788           4 : spdk_nvme_ctrlr_is_feature_supported(struct spdk_nvme_ctrlr *ctrlr, uint8_t feature_code)
    4789             : {
    4790             :         /* No bounds check necessary, since feature_code is uint8_t and feature_supported has 256 entries */
    4791             :         SPDK_STATIC_ASSERT(sizeof(ctrlr->feature_supported) == 256, "feature_supported size mismatch");
    4792           4 :         return ctrlr->feature_supported[feature_code];
    4793             : }
    4794             : 
    4795             : int
    4796           1 : spdk_nvme_ctrlr_attach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
    4797             :                           struct spdk_nvme_ctrlr_list *payload)
    4798             : {
    4799             :         struct nvme_completion_poll_status      *status;
    4800             :         struct spdk_nvme_ns                     *ns;
    4801             :         int                                     res;
    4802             : 
    4803           1 :         if (nsid == 0) {
    4804           0 :                 return -EINVAL;
    4805             :         }
    4806             : 
    4807           1 :         status = calloc(1, sizeof(*status));
    4808           1 :         if (!status) {
    4809           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
    4810           0 :                 return -ENOMEM;
    4811             :         }
    4812             : 
    4813           1 :         res = nvme_ctrlr_cmd_attach_ns(ctrlr, nsid, payload,
    4814             :                                        nvme_completion_poll_cb, status);
    4815           1 :         if (res) {
    4816           0 :                 free(status);
    4817           0 :                 return res;
    4818             :         }
    4819           1 :         if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) {
    4820           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_attach_ns failed!\n");
    4821           0 :                 if (!status->timed_out) {
    4822           0 :                         free(status);
    4823             :                 }
    4824           0 :                 return -ENXIO;
    4825             :         }
    4826           1 :         free(status);
    4827             : 
    4828           1 :         res = nvme_ctrlr_identify_active_ns(ctrlr);
    4829           1 :         if (res) {
    4830           0 :                 return res;
    4831             :         }
    4832             : 
    4833           1 :         ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid);
    4834           1 :         if (ns == NULL) {
    4835           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_get_ns failed!\n");
    4836           0 :                 return -ENXIO;
    4837             :         }
    4838             : 
    4839           1 :         return nvme_ns_construct(ns, nsid, ctrlr);
    4840             : }
    4841             : 
    4842             : int
    4843           1 : spdk_nvme_ctrlr_detach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
    4844             :                           struct spdk_nvme_ctrlr_list *payload)
    4845             : {
    4846             :         struct nvme_completion_poll_status      *status;
    4847             :         int                                     res;
    4848             : 
    4849           1 :         if (nsid == 0) {
    4850           0 :                 return -EINVAL;
    4851             :         }
    4852             : 
    4853           1 :         status = calloc(1, sizeof(*status));
    4854           1 :         if (!status) {
    4855           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
    4856           0 :                 return -ENOMEM;
    4857             :         }
    4858             : 
    4859           1 :         res = nvme_ctrlr_cmd_detach_ns(ctrlr, nsid, payload,
    4860             :                                        nvme_completion_poll_cb, status);
    4861           1 :         if (res) {
    4862           0 :                 free(status);
    4863           0 :                 return res;
    4864             :         }
    4865           1 :         if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) {
    4866           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_detach_ns failed!\n");
    4867           0 :                 if (!status->timed_out) {
    4868           0 :                         free(status);
    4869             :                 }
    4870           0 :                 return -ENXIO;
    4871             :         }
    4872           1 :         free(status);
    4873             : 
    4874           1 :         return nvme_ctrlr_identify_active_ns(ctrlr);
    4875             : }
    4876             : 
    4877             : uint32_t
    4878           1 : spdk_nvme_ctrlr_create_ns(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_ns_data *payload)
    4879             : {
    4880             :         struct nvme_completion_poll_status      *status;
    4881             :         int                                     res;
    4882             :         uint32_t                                nsid;
    4883             : 
    4884           1 :         status = calloc(1, sizeof(*status));
    4885           1 :         if (!status) {
    4886           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
    4887           0 :                 return 0;
    4888             :         }
    4889             : 
    4890           1 :         res = nvme_ctrlr_cmd_create_ns(ctrlr, payload, nvme_completion_poll_cb, status);
    4891           1 :         if (res) {
    4892           0 :                 free(status);
    4893           0 :                 return 0;
    4894             :         }
    4895           1 :         if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) {
    4896           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_create_ns failed!\n");
    4897           0 :                 if (!status->timed_out) {
    4898           0 :                         free(status);
    4899             :                 }
    4900           0 :                 return 0;
    4901             :         }
    4902             : 
    4903           1 :         nsid = status->cpl.cdw0;
    4904           1 :         free(status);
    4905             : 
    4906           1 :         assert(nsid > 0);
    4907             : 
    4908             :         /* Return the namespace ID that was created */
    4909           1 :         return nsid;
    4910             : }
    4911             : 
    4912             : int
    4913           1 : spdk_nvme_ctrlr_delete_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid)
    4914             : {
    4915             :         struct nvme_completion_poll_status      *status;
    4916             :         int                                     res;
    4917             : 
    4918           1 :         if (nsid == 0) {
    4919           0 :                 return -EINVAL;
    4920             :         }
    4921             : 
    4922           1 :         status = calloc(1, sizeof(*status));
    4923           1 :         if (!status) {
    4924           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
    4925           0 :                 return -ENOMEM;
    4926             :         }
    4927             : 
    4928           1 :         res = nvme_ctrlr_cmd_delete_ns(ctrlr, nsid, nvme_completion_poll_cb, status);
    4929           1 :         if (res) {
    4930           0 :                 free(status);
    4931           0 :                 return res;
    4932             :         }
    4933           1 :         if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) {
    4934           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_delete_ns failed!\n");
    4935           0 :                 if (!status->timed_out) {
    4936           0 :                         free(status);
    4937             :                 }
    4938           0 :                 return -ENXIO;
    4939             :         }
    4940           1 :         free(status);
    4941             : 
    4942           1 :         return nvme_ctrlr_identify_active_ns(ctrlr);
    4943             : }
    4944             : 
    4945             : int
    4946           0 : spdk_nvme_ctrlr_format(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
    4947             :                        struct spdk_nvme_format *format)
    4948             : {
    4949             :         struct nvme_completion_poll_status      *status;
    4950             :         int                                     res;
    4951             : 
    4952           0 :         status = calloc(1, sizeof(*status));
    4953           0 :         if (!status) {
    4954           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
    4955           0 :                 return -ENOMEM;
    4956             :         }
    4957             : 
    4958           0 :         res = nvme_ctrlr_cmd_format(ctrlr, nsid, format, nvme_completion_poll_cb,
    4959             :                                     status);
    4960           0 :         if (res) {
    4961           0 :                 free(status);
    4962           0 :                 return res;
    4963             :         }
    4964           0 :         if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) {
    4965           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_format failed!\n");
    4966           0 :                 if (!status->timed_out) {
    4967           0 :                         free(status);
    4968             :                 }
    4969           0 :                 return -ENXIO;
    4970             :         }
    4971           0 :         free(status);
    4972             : 
    4973           0 :         return spdk_nvme_ctrlr_reset(ctrlr);
    4974             : }
    4975             : 
    4976             : int
    4977           8 : spdk_nvme_ctrlr_update_firmware(struct spdk_nvme_ctrlr *ctrlr, void *payload, uint32_t size,
    4978             :                                 int slot, enum spdk_nvme_fw_commit_action commit_action, struct spdk_nvme_status *completion_status)
    4979             : {
    4980           8 :         struct spdk_nvme_fw_commit              fw_commit;
    4981             :         struct nvme_completion_poll_status      *status;
    4982             :         int                                     res;
    4983             :         unsigned int                            size_remaining;
    4984             :         unsigned int                            offset;
    4985             :         unsigned int                            transfer;
    4986             :         uint8_t                                 *p;
    4987             : 
    4988           8 :         if (!completion_status) {
    4989           0 :                 return -EINVAL;
    4990             :         }
    4991           8 :         memset(completion_status, 0, sizeof(struct spdk_nvme_status));
    4992           8 :         if (size % 4) {
    4993           1 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_update_firmware invalid size!\n");
    4994           1 :                 return -1;
    4995             :         }
    4996             : 
    4997             :         /* Current support only for SPDK_NVME_FW_COMMIT_REPLACE_IMG
    4998             :          * and SPDK_NVME_FW_COMMIT_REPLACE_AND_ENABLE_IMG
    4999             :          */
    5000           7 :         if ((commit_action != SPDK_NVME_FW_COMMIT_REPLACE_IMG) &&
    5001             :             (commit_action != SPDK_NVME_FW_COMMIT_REPLACE_AND_ENABLE_IMG)) {
    5002           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_update_firmware invalid command!\n");
    5003           0 :                 return -1;
    5004             :         }
    5005             : 
    5006           7 :         status = calloc(1, sizeof(*status));
    5007           7 :         if (!status) {
    5008           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
    5009           0 :                 return -ENOMEM;
    5010             :         }
    5011             : 
    5012             :         /* Firmware download */
    5013           7 :         size_remaining = size;
    5014           7 :         offset = 0;
    5015           7 :         p = payload;
    5016             : 
    5017          10 :         while (size_remaining > 0) {
    5018           7 :                 transfer = spdk_min(size_remaining, ctrlr->min_page_size);
    5019             : 
    5020           7 :                 memset(status, 0, sizeof(*status));
    5021           7 :                 res = nvme_ctrlr_cmd_fw_image_download(ctrlr, transfer, offset, p,
    5022             :                                                        nvme_completion_poll_cb,
    5023             :                                                        status);
    5024           7 :                 if (res) {
    5025           2 :                         free(status);
    5026           2 :                         return res;
    5027             :                 }
    5028             : 
    5029           5 :                 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) {
    5030           2 :                         NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_fw_image_download failed!\n");
    5031           2 :                         if (!status->timed_out) {
    5032           1 :                                 free(status);
    5033             :                         }
    5034           2 :                         return -ENXIO;
    5035             :                 }
    5036           3 :                 p += transfer;
    5037           3 :                 offset += transfer;
    5038           3 :                 size_remaining -= transfer;
    5039             :         }
    5040             : 
    5041             :         /* Firmware commit */
    5042           3 :         memset(&fw_commit, 0, sizeof(struct spdk_nvme_fw_commit));
    5043           3 :         fw_commit.fs = slot;
    5044           3 :         fw_commit.ca = commit_action;
    5045             : 
    5046           3 :         memset(status, 0, sizeof(*status));
    5047           3 :         res = nvme_ctrlr_cmd_fw_commit(ctrlr, &fw_commit, nvme_completion_poll_cb,
    5048             :                                        status);
    5049           3 :         if (res) {
    5050           1 :                 free(status);
    5051           1 :                 return res;
    5052             :         }
    5053             : 
    5054           2 :         res = nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock);
    5055             : 
    5056           2 :         memcpy(completion_status, &status->cpl.status, sizeof(struct spdk_nvme_status));
    5057             : 
    5058           2 :         if (!status->timed_out) {
    5059           2 :                 free(status);
    5060             :         }
    5061             : 
    5062           2 :         if (res) {
    5063           1 :                 if (completion_status->sct != SPDK_NVME_SCT_COMMAND_SPECIFIC ||
    5064           0 :                     completion_status->sc != SPDK_NVME_SC_FIRMWARE_REQ_NVM_RESET) {
    5065           1 :                         if (completion_status->sct == SPDK_NVME_SCT_COMMAND_SPECIFIC  &&
    5066           0 :                             completion_status->sc == SPDK_NVME_SC_FIRMWARE_REQ_CONVENTIONAL_RESET) {
    5067           0 :                                 NVME_CTRLR_NOTICELOG(ctrlr,
    5068             :                                                      "firmware activation requires conventional reset to be performed. !\n");
    5069             :                         } else {
    5070           1 :                                 NVME_CTRLR_ERRLOG(ctrlr, "nvme_ctrlr_cmd_fw_commit failed!\n");
    5071             :                         }
    5072           1 :                         return -ENXIO;
    5073             :                 }
    5074             :         }
    5075             : 
    5076           1 :         return spdk_nvme_ctrlr_reset(ctrlr);
    5077             : }
    5078             : 
    5079             : int
    5080           0 : spdk_nvme_ctrlr_reserve_cmb(struct spdk_nvme_ctrlr *ctrlr)
    5081             : {
    5082             :         int rc, size;
    5083             :         union spdk_nvme_cmbsz_register cmbsz;
    5084             : 
    5085           0 :         cmbsz = spdk_nvme_ctrlr_get_regs_cmbsz(ctrlr);
    5086             : 
    5087           0 :         if (cmbsz.bits.rds == 0 || cmbsz.bits.wds == 0) {
    5088           0 :                 return -ENOTSUP;
    5089             :         }
    5090             : 
    5091           0 :         size = cmbsz.bits.sz * (0x1000 << (cmbsz.bits.szu * 4));
    5092             : 
    5093           0 :         nvme_ctrlr_lock(ctrlr);
    5094           0 :         rc = nvme_transport_ctrlr_reserve_cmb(ctrlr);
    5095           0 :         nvme_ctrlr_unlock(ctrlr);
    5096             : 
    5097           0 :         if (rc < 0) {
    5098           0 :                 return rc;
    5099             :         }
    5100             : 
    5101           0 :         return size;
    5102             : }
    5103             : 
    5104             : void *
    5105           0 : spdk_nvme_ctrlr_map_cmb(struct spdk_nvme_ctrlr *ctrlr, size_t *size)
    5106             : {
    5107             :         void *buf;
    5108             : 
    5109           0 :         nvme_ctrlr_lock(ctrlr);
    5110           0 :         buf = nvme_transport_ctrlr_map_cmb(ctrlr, size);
    5111           0 :         nvme_ctrlr_unlock(ctrlr);
    5112             : 
    5113           0 :         return buf;
    5114             : }
    5115             : 
    5116             : void
    5117           0 : spdk_nvme_ctrlr_unmap_cmb(struct spdk_nvme_ctrlr *ctrlr)
    5118             : {
    5119           0 :         nvme_ctrlr_lock(ctrlr);
    5120           0 :         nvme_transport_ctrlr_unmap_cmb(ctrlr);
    5121           0 :         nvme_ctrlr_unlock(ctrlr);
    5122           0 : }
    5123             : 
    5124             : int
    5125           0 : spdk_nvme_ctrlr_enable_pmr(struct spdk_nvme_ctrlr *ctrlr)
    5126             : {
    5127             :         int rc;
    5128             : 
    5129           0 :         nvme_ctrlr_lock(ctrlr);
    5130           0 :         rc = nvme_transport_ctrlr_enable_pmr(ctrlr);
    5131           0 :         nvme_ctrlr_unlock(ctrlr);
    5132             : 
    5133           0 :         return rc;
    5134             : }
    5135             : 
    5136             : int
    5137           0 : spdk_nvme_ctrlr_disable_pmr(struct spdk_nvme_ctrlr *ctrlr)
    5138             : {
    5139             :         int rc;
    5140             : 
    5141           0 :         nvme_ctrlr_lock(ctrlr);
    5142           0 :         rc = nvme_transport_ctrlr_disable_pmr(ctrlr);
    5143           0 :         nvme_ctrlr_unlock(ctrlr);
    5144             : 
    5145           0 :         return rc;
    5146             : }
    5147             : 
    5148             : void *
    5149           0 : spdk_nvme_ctrlr_map_pmr(struct spdk_nvme_ctrlr *ctrlr, size_t *size)
    5150             : {
    5151             :         void *buf;
    5152             : 
    5153           0 :         nvme_ctrlr_lock(ctrlr);
    5154           0 :         buf = nvme_transport_ctrlr_map_pmr(ctrlr, size);
    5155           0 :         nvme_ctrlr_unlock(ctrlr);
    5156             : 
    5157           0 :         return buf;
    5158             : }
    5159             : 
    5160             : int
    5161           0 : spdk_nvme_ctrlr_unmap_pmr(struct spdk_nvme_ctrlr *ctrlr)
    5162             : {
    5163             :         int rc;
    5164             : 
    5165           0 :         nvme_ctrlr_lock(ctrlr);
    5166           0 :         rc = nvme_transport_ctrlr_unmap_pmr(ctrlr);
    5167           0 :         nvme_ctrlr_unlock(ctrlr);
    5168             : 
    5169           0 :         return rc;
    5170             : }
    5171             : 
    5172             : int
    5173           0 : spdk_nvme_ctrlr_read_boot_partition_start(struct spdk_nvme_ctrlr *ctrlr, void *payload,
    5174             :                 uint32_t bprsz, uint32_t bprof, uint32_t bpid)
    5175             : {
    5176           0 :         union spdk_nvme_bprsel_register bprsel;
    5177           0 :         union spdk_nvme_bpinfo_register bpinfo;
    5178           0 :         uint64_t bpmbl, bpmb_size;
    5179             : 
    5180           0 :         if (ctrlr->cap.bits.bps == 0) {
    5181           0 :                 return -ENOTSUP;
    5182             :         }
    5183             : 
    5184           0 :         if (nvme_ctrlr_get_bpinfo(ctrlr, &bpinfo)) {
    5185           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "get bpinfo failed\n");
    5186           0 :                 return -EIO;
    5187             :         }
    5188             : 
    5189           0 :         if (bpinfo.bits.brs == SPDK_NVME_BRS_READ_IN_PROGRESS) {
    5190           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Boot Partition read already initiated\n");
    5191           0 :                 return -EALREADY;
    5192             :         }
    5193             : 
    5194           0 :         nvme_ctrlr_lock(ctrlr);
    5195             : 
    5196           0 :         bpmb_size = bprsz * 4096;
    5197           0 :         bpmbl = spdk_vtophys(payload, &bpmb_size);
    5198           0 :         if (bpmbl == SPDK_VTOPHYS_ERROR) {
    5199           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_vtophys of bpmbl failed\n");
    5200           0 :                 nvme_ctrlr_unlock(ctrlr);
    5201           0 :                 return -EFAULT;
    5202             :         }
    5203             : 
    5204           0 :         if (bpmb_size != bprsz * 4096) {
    5205           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Boot Partition buffer is not physically contiguous\n");
    5206           0 :                 nvme_ctrlr_unlock(ctrlr);
    5207           0 :                 return -EFAULT;
    5208             :         }
    5209             : 
    5210           0 :         if (nvme_ctrlr_set_bpmbl(ctrlr, bpmbl)) {
    5211           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "set_bpmbl() failed\n");
    5212           0 :                 nvme_ctrlr_unlock(ctrlr);
    5213           0 :                 return -EIO;
    5214             :         }
    5215             : 
    5216           0 :         bprsel.bits.bpid = bpid;
    5217           0 :         bprsel.bits.bprof = bprof;
    5218           0 :         bprsel.bits.bprsz = bprsz;
    5219             : 
    5220           0 :         if (nvme_ctrlr_set_bprsel(ctrlr, &bprsel)) {
    5221           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "set_bprsel() failed\n");
    5222           0 :                 nvme_ctrlr_unlock(ctrlr);
    5223           0 :                 return -EIO;
    5224             :         }
    5225             : 
    5226           0 :         nvme_ctrlr_unlock(ctrlr);
    5227           0 :         return 0;
    5228             : }
    5229             : 
    5230             : int
    5231           0 : spdk_nvme_ctrlr_read_boot_partition_poll(struct spdk_nvme_ctrlr *ctrlr)
    5232             : {
    5233           0 :         int rc = 0;
    5234           0 :         union spdk_nvme_bpinfo_register bpinfo;
    5235             : 
    5236           0 :         if (nvme_ctrlr_get_bpinfo(ctrlr, &bpinfo)) {
    5237           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "get bpinfo failed\n");
    5238           0 :                 return -EIO;
    5239             :         }
    5240             : 
    5241           0 :         switch (bpinfo.bits.brs) {
    5242           0 :         case SPDK_NVME_BRS_NO_READ:
    5243           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Boot Partition read not initiated\n");
    5244           0 :                 rc = -EINVAL;
    5245           0 :                 break;
    5246           0 :         case SPDK_NVME_BRS_READ_IN_PROGRESS:
    5247           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Boot Partition read in progress\n");
    5248           0 :                 rc = -EAGAIN;
    5249           0 :                 break;
    5250           0 :         case SPDK_NVME_BRS_READ_ERROR:
    5251           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Error completing Boot Partition read\n");
    5252           0 :                 rc = -EIO;
    5253           0 :                 break;
    5254           0 :         case SPDK_NVME_BRS_READ_SUCCESS:
    5255           0 :                 NVME_CTRLR_INFOLOG(ctrlr, "Boot Partition read completed successfully\n");
    5256           0 :                 break;
    5257           0 :         default:
    5258           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Invalid Boot Partition read status\n");
    5259           0 :                 rc = -EINVAL;
    5260             :         }
    5261             : 
    5262           0 :         return rc;
    5263             : }
    5264             : 
    5265             : static void
    5266           0 : nvme_write_boot_partition_cb(void *arg, const struct spdk_nvme_cpl *cpl)
    5267             : {
    5268             :         int res;
    5269           0 :         struct spdk_nvme_ctrlr *ctrlr = arg;
    5270           0 :         struct spdk_nvme_fw_commit fw_commit;
    5271           0 :         struct spdk_nvme_cpl err_cpl =
    5272             :         {.status = {.sct = SPDK_NVME_SCT_GENERIC, .sc = SPDK_NVME_SC_INTERNAL_DEVICE_ERROR }};
    5273             : 
    5274           0 :         if (spdk_nvme_cpl_is_error(cpl)) {
    5275           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Write Boot Partition failed\n");
    5276           0 :                 ctrlr->bp_write_cb_fn(ctrlr->bp_write_cb_arg, cpl);
    5277           0 :                 return;
    5278             :         }
    5279             : 
    5280           0 :         if (ctrlr->bp_ws == SPDK_NVME_BP_WS_DOWNLOADING) {
    5281           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Boot Partition Downloading at Offset %d Success\n", ctrlr->fw_offset);
    5282           0 :                 ctrlr->fw_payload = (uint8_t *)ctrlr->fw_payload + ctrlr->fw_transfer_size;
    5283           0 :                 ctrlr->fw_offset += ctrlr->fw_transfer_size;
    5284           0 :                 ctrlr->fw_size_remaining -= ctrlr->fw_transfer_size;
    5285           0 :                 ctrlr->fw_transfer_size = spdk_min(ctrlr->fw_size_remaining, ctrlr->min_page_size);
    5286           0 :                 res = nvme_ctrlr_cmd_fw_image_download(ctrlr, ctrlr->fw_transfer_size, ctrlr->fw_offset,
    5287             :                                                        ctrlr->fw_payload, nvme_write_boot_partition_cb, ctrlr);
    5288           0 :                 if (res) {
    5289           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "nvme_ctrlr_cmd_fw_image_download failed!\n");
    5290           0 :                         ctrlr->bp_write_cb_fn(ctrlr->bp_write_cb_arg, &err_cpl);
    5291           0 :                         return;
    5292             :                 }
    5293             : 
    5294           0 :                 if (ctrlr->fw_transfer_size < ctrlr->min_page_size) {
    5295           0 :                         ctrlr->bp_ws = SPDK_NVME_BP_WS_DOWNLOADED;
    5296             :                 }
    5297           0 :         } else if (ctrlr->bp_ws == SPDK_NVME_BP_WS_DOWNLOADED) {
    5298           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Boot Partition Download Success\n");
    5299           0 :                 memset(&fw_commit, 0, sizeof(struct spdk_nvme_fw_commit));
    5300           0 :                 fw_commit.bpid = ctrlr->bpid;
    5301           0 :                 fw_commit.ca = SPDK_NVME_FW_COMMIT_REPLACE_BOOT_PARTITION;
    5302           0 :                 res = nvme_ctrlr_cmd_fw_commit(ctrlr, &fw_commit,
    5303             :                                                nvme_write_boot_partition_cb, ctrlr);
    5304           0 :                 if (res) {
    5305           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "nvme_ctrlr_cmd_fw_commit failed!\n");
    5306           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "commit action: %d\n", fw_commit.ca);
    5307           0 :                         ctrlr->bp_write_cb_fn(ctrlr->bp_write_cb_arg, &err_cpl);
    5308           0 :                         return;
    5309             :                 }
    5310             : 
    5311           0 :                 ctrlr->bp_ws = SPDK_NVME_BP_WS_REPLACE;
    5312           0 :         } else if (ctrlr->bp_ws == SPDK_NVME_BP_WS_REPLACE) {
    5313           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Boot Partition Replacement Success\n");
    5314           0 :                 memset(&fw_commit, 0, sizeof(struct spdk_nvme_fw_commit));
    5315           0 :                 fw_commit.bpid = ctrlr->bpid;
    5316           0 :                 fw_commit.ca = SPDK_NVME_FW_COMMIT_ACTIVATE_BOOT_PARTITION;
    5317           0 :                 res = nvme_ctrlr_cmd_fw_commit(ctrlr, &fw_commit,
    5318             :                                                nvme_write_boot_partition_cb, ctrlr);
    5319           0 :                 if (res) {
    5320           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "nvme_ctrlr_cmd_fw_commit failed!\n");
    5321           0 :                         NVME_CTRLR_ERRLOG(ctrlr, "commit action: %d\n", fw_commit.ca);
    5322           0 :                         ctrlr->bp_write_cb_fn(ctrlr->bp_write_cb_arg, &err_cpl);
    5323           0 :                         return;
    5324             :                 }
    5325             : 
    5326           0 :                 ctrlr->bp_ws = SPDK_NVME_BP_WS_ACTIVATE;
    5327           0 :         } else if (ctrlr->bp_ws == SPDK_NVME_BP_WS_ACTIVATE) {
    5328           0 :                 NVME_CTRLR_DEBUGLOG(ctrlr, "Boot Partition Activation Success\n");
    5329           0 :                 ctrlr->bp_write_cb_fn(ctrlr->bp_write_cb_arg, cpl);
    5330             :         } else {
    5331           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Invalid Boot Partition write state\n");
    5332           0 :                 ctrlr->bp_write_cb_fn(ctrlr->bp_write_cb_arg, &err_cpl);
    5333           0 :                 return;
    5334             :         }
    5335             : }
    5336             : 
    5337             : int
    5338           0 : spdk_nvme_ctrlr_write_boot_partition(struct spdk_nvme_ctrlr *ctrlr,
    5339             :                                      void *payload, uint32_t size, uint32_t bpid,
    5340             :                                      spdk_nvme_cmd_cb cb_fn, void *cb_arg)
    5341             : {
    5342             :         int res;
    5343             : 
    5344           0 :         if (ctrlr->cap.bits.bps == 0) {
    5345           0 :                 return -ENOTSUP;
    5346             :         }
    5347             : 
    5348           0 :         ctrlr->bp_ws = SPDK_NVME_BP_WS_DOWNLOADING;
    5349           0 :         ctrlr->bpid = bpid;
    5350           0 :         ctrlr->bp_write_cb_fn = cb_fn;
    5351           0 :         ctrlr->bp_write_cb_arg = cb_arg;
    5352           0 :         ctrlr->fw_offset = 0;
    5353           0 :         ctrlr->fw_size_remaining = size;
    5354           0 :         ctrlr->fw_payload = payload;
    5355           0 :         ctrlr->fw_transfer_size = spdk_min(ctrlr->fw_size_remaining, ctrlr->min_page_size);
    5356             : 
    5357           0 :         res = nvme_ctrlr_cmd_fw_image_download(ctrlr, ctrlr->fw_transfer_size, ctrlr->fw_offset,
    5358             :                                                ctrlr->fw_payload, nvme_write_boot_partition_cb, ctrlr);
    5359             : 
    5360           0 :         return res;
    5361             : }
    5362             : 
    5363             : bool
    5364          43 : spdk_nvme_ctrlr_is_discovery(struct spdk_nvme_ctrlr *ctrlr)
    5365             : {
    5366          43 :         assert(ctrlr);
    5367             : 
    5368          43 :         return !strncmp(ctrlr->trid.subnqn, SPDK_NVMF_DISCOVERY_NQN,
    5369             :                         strlen(SPDK_NVMF_DISCOVERY_NQN));
    5370             : }
    5371             : 
    5372             : bool
    5373          20 : spdk_nvme_ctrlr_is_fabrics(struct spdk_nvme_ctrlr *ctrlr)
    5374             : {
    5375          20 :         assert(ctrlr);
    5376             : 
    5377          20 :         return spdk_nvme_trtype_is_fabrics(ctrlr->trid.trtype);
    5378             : }
    5379             : 
    5380             : int
    5381           0 : spdk_nvme_ctrlr_security_receive(struct spdk_nvme_ctrlr *ctrlr, uint8_t secp,
    5382             :                                  uint16_t spsp, uint8_t nssf, void *payload, size_t size)
    5383             : {
    5384             :         struct nvme_completion_poll_status      *status;
    5385             :         int                                     res;
    5386             : 
    5387           0 :         status = calloc(1, sizeof(*status));
    5388           0 :         if (!status) {
    5389           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
    5390           0 :                 return -ENOMEM;
    5391             :         }
    5392             : 
    5393           0 :         res = spdk_nvme_ctrlr_cmd_security_receive(ctrlr, secp, spsp, nssf, payload, size,
    5394             :                         nvme_completion_poll_cb, status);
    5395           0 :         if (res) {
    5396           0 :                 free(status);
    5397           0 :                 return res;
    5398             :         }
    5399           0 :         if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) {
    5400           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_cmd_security_receive failed!\n");
    5401           0 :                 if (!status->timed_out) {
    5402           0 :                         free(status);
    5403             :                 }
    5404           0 :                 return -ENXIO;
    5405             :         }
    5406           0 :         free(status);
    5407             : 
    5408           0 :         return 0;
    5409             : }
    5410             : 
    5411             : int
    5412           0 : spdk_nvme_ctrlr_security_send(struct spdk_nvme_ctrlr *ctrlr, uint8_t secp,
    5413             :                               uint16_t spsp, uint8_t nssf, void *payload, size_t size)
    5414             : {
    5415             :         struct nvme_completion_poll_status      *status;
    5416             :         int                                     res;
    5417             : 
    5418           0 :         status = calloc(1, sizeof(*status));
    5419           0 :         if (!status) {
    5420           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "Failed to allocate status tracker\n");
    5421           0 :                 return -ENOMEM;
    5422             :         }
    5423             : 
    5424           0 :         res = spdk_nvme_ctrlr_cmd_security_send(ctrlr, secp, spsp, nssf, payload, size,
    5425             :                                                 nvme_completion_poll_cb,
    5426             :                                                 status);
    5427           0 :         if (res) {
    5428           0 :                 free(status);
    5429           0 :                 return res;
    5430             :         }
    5431           0 :         if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) {
    5432           0 :                 NVME_CTRLR_ERRLOG(ctrlr, "spdk_nvme_ctrlr_cmd_security_send failed!\n");
    5433           0 :                 if (!status->timed_out) {
    5434           0 :                         free(status);
    5435             :                 }
    5436           0 :                 return -ENXIO;
    5437             :         }
    5438             : 
    5439           0 :         free(status);
    5440             : 
    5441           0 :         return 0;
    5442             : }
    5443             : 
    5444             : uint64_t
    5445           1 : spdk_nvme_ctrlr_get_flags(struct spdk_nvme_ctrlr *ctrlr)
    5446             : {
    5447           1 :         return ctrlr->flags;
    5448             : }
    5449             : 
    5450             : const struct spdk_nvme_transport_id *
    5451           0 : spdk_nvme_ctrlr_get_transport_id(struct spdk_nvme_ctrlr *ctrlr)
    5452             : {
    5453           0 :         return &ctrlr->trid;
    5454             : }
    5455             : 
    5456             : int32_t
    5457          17 : spdk_nvme_ctrlr_alloc_qid(struct spdk_nvme_ctrlr *ctrlr)
    5458             : {
    5459             :         uint32_t qid;
    5460             : 
    5461          17 :         assert(ctrlr->free_io_qids);
    5462          17 :         nvme_ctrlr_lock(ctrlr);
    5463          17 :         qid = spdk_bit_array_find_first_set(ctrlr->free_io_qids, 1);
    5464          17 :         if (qid > ctrlr->opts.num_io_queues) {
    5465           2 :                 NVME_CTRLR_ERRLOG(ctrlr, "No free I/O queue IDs\n");
    5466           2 :                 nvme_ctrlr_unlock(ctrlr);
    5467           2 :                 return -1;
    5468             :         }
    5469             : 
    5470          15 :         spdk_bit_array_clear(ctrlr->free_io_qids, qid);
    5471          15 :         nvme_ctrlr_unlock(ctrlr);
    5472          15 :         return qid;
    5473             : }
    5474             : 
    5475             : void
    5476          64 : spdk_nvme_ctrlr_free_qid(struct spdk_nvme_ctrlr *ctrlr, uint16_t qid)
    5477             : {
    5478          64 :         assert(qid <= ctrlr->opts.num_io_queues);
    5479             : 
    5480          64 :         nvme_ctrlr_lock(ctrlr);
    5481             : 
    5482          64 :         if (spdk_likely(ctrlr->free_io_qids)) {
    5483          64 :                 spdk_bit_array_set(ctrlr->free_io_qids, qid);
    5484             :         }
    5485             : 
    5486          64 :         nvme_ctrlr_unlock(ctrlr);
    5487          64 : }
    5488             : 
    5489             : int
    5490           2 : spdk_nvme_ctrlr_get_memory_domains(const struct spdk_nvme_ctrlr *ctrlr,
    5491             :                                    struct spdk_memory_domain **domains, int array_size)
    5492             : {
    5493           2 :         return nvme_transport_ctrlr_get_memory_domains(ctrlr, domains, array_size);
    5494             : }

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