Line data Source code
1 : /* SPDX-License-Identifier: BSD-3-Clause
2 : * Copyright (C) 2021 Intel Corporation. All rights reserved.
3 : * Copyright (c) 2021 Mellanox Technologies LTD. All rights reserved.
4 : * Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
5 : */
6 :
7 : /*
8 : * NVMe over PCIe common library
9 : */
10 :
11 : #include "spdk/stdinc.h"
12 : #include "spdk/likely.h"
13 : #include "spdk/string.h"
14 : #include "nvme_internal.h"
15 : #include "nvme_pcie_internal.h"
16 : #include "spdk/trace.h"
17 :
18 : #include "spdk_internal/trace_defs.h"
19 :
20 : __thread struct nvme_pcie_ctrlr *g_thread_mmio_ctrlr = NULL;
21 :
22 : static struct spdk_nvme_pcie_stat g_dummy_stat = {};
23 :
24 : static void nvme_pcie_fail_request_bad_vtophys(struct spdk_nvme_qpair *qpair,
25 : struct nvme_tracker *tr);
26 :
27 : static inline uint64_t
28 2093 : nvme_pcie_vtophys(struct spdk_nvme_ctrlr *ctrlr, const void *buf, uint64_t *size)
29 : {
30 2093 : if (spdk_likely(ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE)) {
31 2086 : return spdk_vtophys(buf, size);
32 : } else {
33 : /* vfio-user address translation with IOVA=VA mode */
34 7 : return (uint64_t)(uintptr_t)buf;
35 : }
36 : }
37 :
38 : int
39 6 : nvme_pcie_qpair_reset(struct spdk_nvme_qpair *qpair)
40 : {
41 6 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
42 : uint32_t i;
43 :
44 : /* all head/tail vals are set to 0 */
45 6 : pqpair->last_sq_tail = pqpair->sq_tail = pqpair->sq_head = pqpair->cq_head = 0;
46 :
47 : /*
48 : * First time through the completion queue, HW will set phase
49 : * bit on completions to 1. So set this to 1 here, indicating
50 : * we're looking for a 1 to know which entries have completed.
51 : * we'll toggle the bit each time when the completion queue
52 : * rolls over.
53 : */
54 6 : pqpair->flags.phase = 1;
55 46 : for (i = 0; i < pqpair->num_entries; i++) {
56 40 : pqpair->cpl[i].status.p = 0;
57 : }
58 :
59 6 : return 0;
60 : }
61 :
62 : static void
63 27 : nvme_qpair_construct_tracker(struct nvme_tracker *tr, uint16_t cid, uint64_t phys_addr)
64 : {
65 27 : tr->prp_sgl_bus_addr = phys_addr + offsetof(struct nvme_tracker, u.prp);
66 27 : tr->cid = cid;
67 27 : tr->req = NULL;
68 27 : }
69 :
70 : static void *
71 4 : nvme_pcie_ctrlr_alloc_cmb(struct spdk_nvme_ctrlr *ctrlr, uint64_t size, uint64_t alignment,
72 : uint64_t *phys_addr)
73 : {
74 4 : struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr);
75 : uintptr_t addr;
76 :
77 4 : if (pctrlr->cmb.mem_register_addr != NULL) {
78 : /* BAR is mapped for data */
79 1 : return NULL;
80 : }
81 :
82 3 : addr = (uintptr_t)pctrlr->cmb.bar_va + pctrlr->cmb.current_offset;
83 3 : addr = (addr + (alignment - 1)) & ~(alignment - 1);
84 :
85 : /* CMB may only consume part of the BAR, calculate accordingly */
86 3 : if (addr + size > ((uintptr_t)pctrlr->cmb.bar_va + pctrlr->cmb.size)) {
87 1 : SPDK_ERRLOG("Tried to allocate past valid CMB range!\n");
88 1 : return NULL;
89 : }
90 2 : *phys_addr = pctrlr->cmb.bar_pa + addr - (uintptr_t)pctrlr->cmb.bar_va;
91 :
92 2 : pctrlr->cmb.current_offset = (addr + size) - (uintptr_t)pctrlr->cmb.bar_va;
93 :
94 2 : return (void *)addr;
95 : }
96 :
97 : int
98 4 : nvme_pcie_qpair_construct(struct spdk_nvme_qpair *qpair,
99 : const struct spdk_nvme_io_qpair_opts *opts)
100 : {
101 4 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
102 4 : struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr);
103 4 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
104 : struct nvme_tracker *tr;
105 : uint16_t i;
106 : uint16_t num_trackers;
107 4 : size_t page_align = sysconf(_SC_PAGESIZE);
108 : size_t queue_align, queue_len;
109 4 : uint32_t flags = SPDK_MALLOC_DMA;
110 : uint32_t socket_id;
111 4 : uint64_t sq_paddr = 0;
112 4 : uint64_t cq_paddr = 0;
113 :
114 4 : if (opts) {
115 2 : pqpair->sq_vaddr = opts->sq.vaddr;
116 2 : pqpair->cq_vaddr = opts->cq.vaddr;
117 2 : sq_paddr = opts->sq.paddr;
118 2 : cq_paddr = opts->cq.paddr;
119 : }
120 :
121 4 : pqpair->retry_count = ctrlr->opts.transport_retry_count;
122 :
123 : /*
124 : * Limit the maximum number of completions to return per call to prevent wraparound,
125 : * and calculate how many trackers can be submitted at once without overflowing the
126 : * completion queue.
127 : */
128 4 : pqpair->max_completions_cap = pqpair->num_entries / 4;
129 4 : pqpair->max_completions_cap = spdk_max(pqpair->max_completions_cap, NVME_MIN_COMPLETIONS);
130 4 : pqpair->max_completions_cap = spdk_min(pqpair->max_completions_cap, NVME_MAX_COMPLETIONS);
131 4 : num_trackers = pqpair->num_entries - pqpair->max_completions_cap;
132 :
133 4 : SPDK_INFOLOG(nvme, "max_completions_cap = %" PRIu16 " num_trackers = %" PRIu16 "\n",
134 : pqpair->max_completions_cap, num_trackers);
135 :
136 4 : assert(num_trackers != 0);
137 :
138 4 : pqpair->sq_in_cmb = false;
139 :
140 4 : if (nvme_qpair_is_admin_queue(&pqpair->qpair)) {
141 1 : flags |= SPDK_MALLOC_SHARE;
142 : }
143 :
144 : /* cmd and cpl rings must be aligned on page size boundaries. */
145 4 : if (ctrlr->opts.use_cmb_sqs) {
146 1 : pqpair->cmd = nvme_pcie_ctrlr_alloc_cmb(ctrlr, pqpair->num_entries * sizeof(struct spdk_nvme_cmd),
147 : page_align, &pqpair->cmd_bus_addr);
148 1 : if (pqpair->cmd != NULL) {
149 1 : pqpair->sq_in_cmb = true;
150 : }
151 : }
152 :
153 4 : if (pqpair->sq_in_cmb == false) {
154 3 : if (pqpair->sq_vaddr) {
155 1 : pqpair->cmd = pqpair->sq_vaddr;
156 : } else {
157 : /* To ensure physical address contiguity we make each ring occupy
158 : * a single hugepage only. See MAX_IO_QUEUE_ENTRIES.
159 : */
160 2 : queue_len = pqpair->num_entries * sizeof(struct spdk_nvme_cmd);
161 2 : queue_align = spdk_max(spdk_align32pow2(queue_len), page_align);
162 2 : pqpair->cmd = spdk_zmalloc(queue_len, queue_align, NULL, SPDK_ENV_SOCKET_ID_ANY, flags);
163 2 : if (pqpair->cmd == NULL) {
164 0 : SPDK_ERRLOG("alloc qpair_cmd failed\n");
165 0 : return -ENOMEM;
166 : }
167 : }
168 3 : if (sq_paddr) {
169 1 : assert(pqpair->sq_vaddr != NULL);
170 1 : pqpair->cmd_bus_addr = sq_paddr;
171 : } else {
172 2 : pqpair->cmd_bus_addr = nvme_pcie_vtophys(ctrlr, pqpair->cmd, NULL);
173 2 : if (pqpair->cmd_bus_addr == SPDK_VTOPHYS_ERROR) {
174 0 : SPDK_ERRLOG("spdk_vtophys(pqpair->cmd) failed\n");
175 0 : return -EFAULT;
176 : }
177 : }
178 : }
179 :
180 4 : if (pqpair->cq_vaddr) {
181 2 : pqpair->cpl = pqpair->cq_vaddr;
182 : } else {
183 2 : queue_len = pqpair->num_entries * sizeof(struct spdk_nvme_cpl);
184 2 : queue_align = spdk_max(spdk_align32pow2(queue_len), page_align);
185 2 : socket_id = spdk_nvme_ctrlr_get_socket_id(ctrlr);
186 2 : pqpair->cpl = spdk_zmalloc(queue_len, queue_align, NULL, socket_id, flags);
187 2 : if (pqpair->cpl == NULL) {
188 0 : SPDK_ERRLOG("alloc qpair_cpl failed\n");
189 0 : return -ENOMEM;
190 : }
191 : }
192 4 : if (cq_paddr) {
193 2 : assert(pqpair->cq_vaddr != NULL);
194 2 : pqpair->cpl_bus_addr = cq_paddr;
195 : } else {
196 2 : pqpair->cpl_bus_addr = nvme_pcie_vtophys(ctrlr, pqpair->cpl, NULL);
197 2 : if (pqpair->cpl_bus_addr == SPDK_VTOPHYS_ERROR) {
198 0 : SPDK_ERRLOG("spdk_vtophys(pqpair->cpl) failed\n");
199 0 : return -EFAULT;
200 : }
201 : }
202 :
203 4 : pqpair->sq_tdbl = pctrlr->doorbell_base + (2 * qpair->id + 0) * pctrlr->doorbell_stride_u32;
204 4 : pqpair->cq_hdbl = pctrlr->doorbell_base + (2 * qpair->id + 1) * pctrlr->doorbell_stride_u32;
205 :
206 : /*
207 : * Reserve space for all of the trackers in a single allocation.
208 : * struct nvme_tracker must be padded so that its size is already a power of 2.
209 : * This ensures the PRP list embedded in the nvme_tracker object will not span a
210 : * 4KB boundary, while allowing access to trackers in tr[] via normal array indexing.
211 : */
212 4 : pqpair->tr = spdk_zmalloc(num_trackers * sizeof(*tr), sizeof(*tr), NULL,
213 : SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE);
214 4 : if (pqpair->tr == NULL) {
215 0 : SPDK_ERRLOG("nvme_tr failed\n");
216 0 : return -ENOMEM;
217 : }
218 :
219 4 : TAILQ_INIT(&pqpair->free_tr);
220 4 : TAILQ_INIT(&pqpair->outstanding_tr);
221 4 : pqpair->qpair.queue_depth = 0;
222 :
223 31 : for (i = 0; i < num_trackers; i++) {
224 27 : tr = &pqpair->tr[i];
225 27 : nvme_qpair_construct_tracker(tr, i, nvme_pcie_vtophys(ctrlr, tr, NULL));
226 27 : TAILQ_INSERT_HEAD(&pqpair->free_tr, tr, tq_list);
227 : }
228 :
229 4 : nvme_pcie_qpair_reset(qpair);
230 :
231 4 : return 0;
232 : }
233 :
234 : int
235 1 : nvme_pcie_ctrlr_construct_admin_qpair(struct spdk_nvme_ctrlr *ctrlr, uint16_t num_entries)
236 : {
237 : struct nvme_pcie_qpair *pqpair;
238 : int rc;
239 :
240 1 : pqpair = spdk_zmalloc(sizeof(*pqpair), 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE);
241 1 : if (pqpair == NULL) {
242 0 : return -ENOMEM;
243 : }
244 :
245 1 : pqpair->num_entries = num_entries;
246 1 : pqpair->flags.delay_cmd_submit = 0;
247 1 : pqpair->pcie_state = NVME_PCIE_QPAIR_READY;
248 :
249 1 : ctrlr->adminq = &pqpair->qpair;
250 :
251 1 : rc = nvme_qpair_init(ctrlr->adminq,
252 : 0, /* qpair ID */
253 : ctrlr,
254 : SPDK_NVME_QPRIO_URGENT,
255 : num_entries,
256 : false);
257 1 : if (rc != 0) {
258 0 : return rc;
259 : }
260 :
261 1 : pqpair->stat = spdk_zmalloc(sizeof(*pqpair->stat), 64, NULL, SPDK_ENV_SOCKET_ID_ANY,
262 : SPDK_MALLOC_SHARE);
263 1 : if (!pqpair->stat) {
264 0 : SPDK_ERRLOG("Failed to allocate admin qpair statistics\n");
265 0 : return -ENOMEM;
266 : }
267 :
268 1 : return nvme_pcie_qpair_construct(ctrlr->adminq, NULL);
269 : }
270 :
271 : /**
272 : * Note: the ctrlr_lock must be held when calling this function.
273 : */
274 : void
275 0 : nvme_pcie_qpair_insert_pending_admin_request(struct spdk_nvme_qpair *qpair,
276 : struct nvme_request *req, struct spdk_nvme_cpl *cpl)
277 : {
278 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
279 0 : struct nvme_request *active_req = req;
280 : struct spdk_nvme_ctrlr_process *active_proc;
281 :
282 : /*
283 : * The admin request is from another process. Move to the per
284 : * process list for that process to handle it later.
285 : */
286 0 : assert(nvme_qpair_is_admin_queue(qpair));
287 0 : assert(active_req->pid != getpid());
288 :
289 0 : active_proc = nvme_ctrlr_get_process(ctrlr, active_req->pid);
290 0 : if (active_proc) {
291 : /* Save the original completion information */
292 0 : memcpy(&active_req->cpl, cpl, sizeof(*cpl));
293 0 : STAILQ_INSERT_TAIL(&active_proc->active_reqs, active_req, stailq);
294 : } else {
295 0 : SPDK_ERRLOG("The owning process (pid %d) is not found. Dropping the request.\n",
296 : active_req->pid);
297 0 : nvme_cleanup_user_req(active_req);
298 0 : nvme_free_request(active_req);
299 : }
300 0 : }
301 :
302 : /**
303 : * Note: the ctrlr_lock must be held when calling this function.
304 : */
305 : void
306 0 : nvme_pcie_qpair_complete_pending_admin_request(struct spdk_nvme_qpair *qpair)
307 : {
308 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
309 : struct nvme_request *req, *tmp_req;
310 0 : pid_t pid = getpid();
311 : struct spdk_nvme_ctrlr_process *proc;
312 :
313 : /*
314 : * Check whether there is any pending admin request from
315 : * other active processes.
316 : */
317 0 : assert(nvme_qpair_is_admin_queue(qpair));
318 :
319 0 : proc = nvme_ctrlr_get_current_process(ctrlr);
320 0 : if (!proc) {
321 0 : SPDK_ERRLOG("the active process (pid %d) is not found for this controller.\n", pid);
322 0 : assert(proc);
323 0 : return;
324 : }
325 :
326 0 : STAILQ_FOREACH_SAFE(req, &proc->active_reqs, stailq, tmp_req) {
327 0 : STAILQ_REMOVE(&proc->active_reqs, req, nvme_request, stailq);
328 :
329 0 : assert(req->pid == pid);
330 :
331 0 : nvme_complete_request(req->cb_fn, req->cb_arg, qpair, req, &req->cpl);
332 : }
333 : }
334 :
335 : int
336 7 : nvme_pcie_ctrlr_cmd_create_io_cq(struct spdk_nvme_ctrlr *ctrlr,
337 : struct spdk_nvme_qpair *io_que, spdk_nvme_cmd_cb cb_fn,
338 : void *cb_arg)
339 : {
340 7 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(io_que);
341 : struct nvme_request *req;
342 : struct spdk_nvme_cmd *cmd;
343 :
344 7 : req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg);
345 7 : if (req == NULL) {
346 2 : return -ENOMEM;
347 : }
348 :
349 5 : cmd = &req->cmd;
350 5 : cmd->opc = SPDK_NVME_OPC_CREATE_IO_CQ;
351 :
352 5 : cmd->cdw10_bits.create_io_q.qid = io_que->id;
353 5 : cmd->cdw10_bits.create_io_q.qsize = pqpair->num_entries - 1;
354 :
355 5 : cmd->cdw11_bits.create_io_cq.pc = 1;
356 5 : cmd->dptr.prp.prp1 = pqpair->cpl_bus_addr;
357 :
358 5 : return nvme_ctrlr_submit_admin_request(ctrlr, req);
359 : }
360 :
361 : int
362 5 : nvme_pcie_ctrlr_cmd_create_io_sq(struct spdk_nvme_ctrlr *ctrlr,
363 : struct spdk_nvme_qpair *io_que, spdk_nvme_cmd_cb cb_fn, void *cb_arg)
364 : {
365 5 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(io_que);
366 : struct nvme_request *req;
367 : struct spdk_nvme_cmd *cmd;
368 :
369 5 : req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg);
370 5 : if (req == NULL) {
371 1 : return -ENOMEM;
372 : }
373 :
374 4 : cmd = &req->cmd;
375 4 : cmd->opc = SPDK_NVME_OPC_CREATE_IO_SQ;
376 :
377 4 : cmd->cdw10_bits.create_io_q.qid = io_que->id;
378 4 : cmd->cdw10_bits.create_io_q.qsize = pqpair->num_entries - 1;
379 4 : cmd->cdw11_bits.create_io_sq.pc = 1;
380 4 : cmd->cdw11_bits.create_io_sq.qprio = io_que->qprio;
381 4 : cmd->cdw11_bits.create_io_sq.cqid = io_que->id;
382 4 : cmd->dptr.prp.prp1 = pqpair->cmd_bus_addr;
383 :
384 4 : return nvme_ctrlr_submit_admin_request(ctrlr, req);
385 : }
386 :
387 : int
388 3 : nvme_pcie_ctrlr_cmd_delete_io_cq(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair,
389 : spdk_nvme_cmd_cb cb_fn, void *cb_arg)
390 : {
391 : struct nvme_request *req;
392 : struct spdk_nvme_cmd *cmd;
393 :
394 3 : req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg);
395 3 : if (req == NULL) {
396 1 : return -ENOMEM;
397 : }
398 :
399 2 : cmd = &req->cmd;
400 2 : cmd->opc = SPDK_NVME_OPC_DELETE_IO_CQ;
401 2 : cmd->cdw10_bits.delete_io_q.qid = qpair->id;
402 :
403 2 : return nvme_ctrlr_submit_admin_request(ctrlr, req);
404 : }
405 :
406 : int
407 2 : nvme_pcie_ctrlr_cmd_delete_io_sq(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair,
408 : spdk_nvme_cmd_cb cb_fn, void *cb_arg)
409 : {
410 : struct nvme_request *req;
411 : struct spdk_nvme_cmd *cmd;
412 :
413 2 : req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg);
414 2 : if (req == NULL) {
415 1 : return -ENOMEM;
416 : }
417 :
418 1 : cmd = &req->cmd;
419 1 : cmd->opc = SPDK_NVME_OPC_DELETE_IO_SQ;
420 1 : cmd->cdw10_bits.delete_io_q.qid = qpair->id;
421 :
422 1 : return nvme_ctrlr_submit_admin_request(ctrlr, req);
423 : }
424 :
425 : static void
426 1 : nvme_completion_sq_error_delete_cq_cb(void *arg, const struct spdk_nvme_cpl *cpl)
427 : {
428 1 : struct spdk_nvme_qpair *qpair = arg;
429 1 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
430 :
431 1 : if (spdk_nvme_cpl_is_error(cpl)) {
432 0 : SPDK_ERRLOG("delete_io_cq failed!\n");
433 : }
434 :
435 1 : pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED;
436 1 : }
437 :
438 : static void
439 3 : nvme_completion_create_sq_cb(void *arg, const struct spdk_nvme_cpl *cpl)
440 : {
441 3 : struct spdk_nvme_qpair *qpair = arg;
442 3 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
443 3 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
444 3 : struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr);
445 : int rc;
446 :
447 3 : if (pqpair->flags.defer_destruction) {
448 : /* This qpair was deleted by the application while the
449 : * connection was still in progress. We had to wait
450 : * to free the qpair resources until this outstanding
451 : * command was completed. Now that we have the completion
452 : * free it now.
453 : */
454 0 : nvme_pcie_qpair_destroy(qpair);
455 0 : return;
456 : }
457 :
458 3 : if (spdk_nvme_cpl_is_error(cpl)) {
459 1 : SPDK_ERRLOG("nvme_create_io_sq failed, deleting cq!\n");
460 1 : rc = nvme_pcie_ctrlr_cmd_delete_io_cq(qpair->ctrlr, qpair, nvme_completion_sq_error_delete_cq_cb,
461 : qpair);
462 1 : if (rc != 0) {
463 0 : SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc);
464 0 : pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED;
465 : }
466 1 : return;
467 : }
468 2 : pqpair->pcie_state = NVME_PCIE_QPAIR_READY;
469 2 : if (ctrlr->shadow_doorbell) {
470 1 : pqpair->shadow_doorbell.sq_tdbl = ctrlr->shadow_doorbell + (2 * qpair->id + 0) *
471 1 : pctrlr->doorbell_stride_u32;
472 1 : pqpair->shadow_doorbell.cq_hdbl = ctrlr->shadow_doorbell + (2 * qpair->id + 1) *
473 1 : pctrlr->doorbell_stride_u32;
474 1 : pqpair->shadow_doorbell.sq_eventidx = ctrlr->eventidx + (2 * qpair->id + 0) *
475 1 : pctrlr->doorbell_stride_u32;
476 1 : pqpair->shadow_doorbell.cq_eventidx = ctrlr->eventidx + (2 * qpair->id + 1) *
477 1 : pctrlr->doorbell_stride_u32;
478 1 : pqpair->flags.has_shadow_doorbell = 1;
479 : } else {
480 1 : pqpair->flags.has_shadow_doorbell = 0;
481 : }
482 2 : nvme_pcie_qpair_reset(qpair);
483 :
484 : }
485 :
486 : static void
487 4 : nvme_completion_create_cq_cb(void *arg, const struct spdk_nvme_cpl *cpl)
488 : {
489 4 : struct spdk_nvme_qpair *qpair = arg;
490 4 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
491 : int rc;
492 :
493 4 : if (pqpair->flags.defer_destruction) {
494 : /* This qpair was deleted by the application while the
495 : * connection was still in progress. We had to wait
496 : * to free the qpair resources until this outstanding
497 : * command was completed. Now that we have the completion
498 : * free it now.
499 : */
500 0 : nvme_pcie_qpair_destroy(qpair);
501 0 : return;
502 : }
503 :
504 4 : if (spdk_nvme_cpl_is_error(cpl)) {
505 1 : pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED;
506 1 : SPDK_ERRLOG("nvme_create_io_cq failed!\n");
507 1 : return;
508 : }
509 :
510 3 : rc = nvme_pcie_ctrlr_cmd_create_io_sq(qpair->ctrlr, qpair, nvme_completion_create_sq_cb, qpair);
511 :
512 3 : if (rc != 0) {
513 0 : SPDK_ERRLOG("Failed to send request to create_io_sq, deleting cq!\n");
514 0 : rc = nvme_pcie_ctrlr_cmd_delete_io_cq(qpair->ctrlr, qpair, nvme_completion_sq_error_delete_cq_cb,
515 : qpair);
516 0 : if (rc != 0) {
517 0 : SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc);
518 0 : pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED;
519 : }
520 0 : return;
521 : }
522 3 : pqpair->pcie_state = NVME_PCIE_QPAIR_WAIT_FOR_SQ;
523 : }
524 :
525 : static int
526 5 : _nvme_pcie_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair,
527 : uint16_t qid)
528 : {
529 5 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
530 : int rc;
531 :
532 : /* Statistics may already be allocated in the case of controller reset */
533 5 : if (qpair->poll_group) {
534 5 : struct nvme_pcie_poll_group *group = SPDK_CONTAINEROF(qpair->poll_group,
535 : struct nvme_pcie_poll_group, group);
536 :
537 5 : pqpair->stat = &group->stats;
538 5 : pqpair->shared_stats = true;
539 : } else {
540 0 : if (pqpair->stat == NULL) {
541 0 : pqpair->stat = calloc(1, sizeof(*pqpair->stat));
542 0 : if (!pqpair->stat) {
543 0 : SPDK_ERRLOG("Failed to allocate qpair statistics\n");
544 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED);
545 0 : return -ENOMEM;
546 : }
547 : }
548 : }
549 :
550 5 : rc = nvme_pcie_ctrlr_cmd_create_io_cq(ctrlr, qpair, nvme_completion_create_cq_cb, qpair);
551 :
552 5 : if (rc != 0) {
553 1 : SPDK_ERRLOG("Failed to send request to create_io_cq\n");
554 1 : nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED);
555 1 : return rc;
556 : }
557 4 : pqpair->pcie_state = NVME_PCIE_QPAIR_WAIT_FOR_CQ;
558 4 : return 0;
559 : }
560 :
561 : int
562 5 : nvme_pcie_ctrlr_connect_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair)
563 : {
564 5 : int rc = 0;
565 :
566 5 : if (!nvme_qpair_is_admin_queue(qpair)) {
567 5 : rc = _nvme_pcie_ctrlr_create_io_qpair(ctrlr, qpair, qpair->id);
568 : } else {
569 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_CONNECTED);
570 : }
571 :
572 5 : return rc;
573 : }
574 :
575 : void
576 0 : nvme_pcie_ctrlr_disconnect_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair)
577 : {
578 0 : if (!nvme_qpair_is_admin_queue(qpair) || !ctrlr->is_disconnecting) {
579 0 : nvme_transport_ctrlr_disconnect_qpair_done(qpair);
580 : } else {
581 : /* If this function is called for the admin qpair via spdk_nvme_ctrlr_reset()
582 : * or spdk_nvme_ctrlr_disconnect(), initiate a Controller Level Reset.
583 : * Then we can abort trackers safely because the Controller Level Reset deletes
584 : * all I/O SQ/CQs.
585 : */
586 0 : nvme_ctrlr_disable(ctrlr);
587 : }
588 0 : }
589 :
590 : /* Used when dst points to MMIO (i.e. CMB) in a virtual machine - in these cases we must
591 : * not use wide instructions because QEMU will not emulate such instructions to MMIO space.
592 : * So this function ensures we only copy 8 bytes at a time.
593 : */
594 : static inline void
595 0 : nvme_pcie_copy_command_mmio(struct spdk_nvme_cmd *dst, const struct spdk_nvme_cmd *src)
596 : {
597 0 : uint64_t *dst64 = (uint64_t *)dst;
598 0 : const uint64_t *src64 = (const uint64_t *)src;
599 : uint32_t i;
600 :
601 0 : for (i = 0; i < sizeof(*dst) / 8; i++) {
602 0 : dst64[i] = src64[i];
603 : }
604 0 : }
605 :
606 : static inline void
607 0 : nvme_pcie_copy_command(struct spdk_nvme_cmd *dst, const struct spdk_nvme_cmd *src)
608 : {
609 : /* dst and src are known to be non-overlapping and 64-byte aligned. */
610 : #if defined(__SSE2__)
611 0 : __m128i *d128 = (__m128i *)dst;
612 0 : const __m128i *s128 = (const __m128i *)src;
613 :
614 0 : _mm_stream_si128(&d128[0], _mm_load_si128(&s128[0]));
615 0 : _mm_stream_si128(&d128[1], _mm_load_si128(&s128[1]));
616 0 : _mm_stream_si128(&d128[2], _mm_load_si128(&s128[2]));
617 0 : _mm_stream_si128(&d128[3], _mm_load_si128(&s128[3]));
618 : #else
619 : *dst = *src;
620 : #endif
621 0 : }
622 :
623 : void
624 0 : nvme_pcie_qpair_submit_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr)
625 : {
626 : struct nvme_request *req;
627 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
628 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
629 :
630 0 : req = tr->req;
631 0 : assert(req != NULL);
632 :
633 0 : spdk_trace_record(TRACE_NVME_PCIE_SUBMIT, qpair->id, 0, (uintptr_t)req, req->cb_arg,
634 : (uint32_t)req->cmd.cid, (uint32_t)req->cmd.opc,
635 : req->cmd.cdw10, req->cmd.cdw11, req->cmd.cdw12,
636 : pqpair->qpair.queue_depth);
637 :
638 0 : if (req->cmd.fuse) {
639 : /*
640 : * Keep track of the fuse operation sequence so that we ring the doorbell only
641 : * after the second fuse is submitted.
642 : */
643 0 : qpair->last_fuse = req->cmd.fuse;
644 : }
645 :
646 : /* Don't use wide instructions to copy NVMe command, this is limited by QEMU
647 : * virtual NVMe controller, the maximum access width is 8 Bytes for one time.
648 : */
649 0 : if (spdk_unlikely((ctrlr->quirks & NVME_QUIRK_MAXIMUM_PCI_ACCESS_WIDTH) && pqpair->sq_in_cmb)) {
650 0 : nvme_pcie_copy_command_mmio(&pqpair->cmd[pqpair->sq_tail], &req->cmd);
651 : } else {
652 : /* Copy the command from the tracker to the submission queue. */
653 0 : nvme_pcie_copy_command(&pqpair->cmd[pqpair->sq_tail], &req->cmd);
654 : }
655 :
656 0 : if (spdk_unlikely(++pqpair->sq_tail == pqpair->num_entries)) {
657 0 : pqpair->sq_tail = 0;
658 : }
659 :
660 0 : if (spdk_unlikely(pqpair->sq_tail == pqpair->sq_head)) {
661 0 : SPDK_ERRLOG("sq_tail is passing sq_head!\n");
662 : }
663 :
664 0 : if (!pqpair->flags.delay_cmd_submit) {
665 0 : nvme_pcie_qpair_ring_sq_doorbell(qpair);
666 : }
667 0 : }
668 :
669 : void
670 0 : nvme_pcie_qpair_complete_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr,
671 : struct spdk_nvme_cpl *cpl, bool print_on_error)
672 : {
673 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
674 : struct nvme_request *req;
675 : bool retry, error;
676 : bool print_error;
677 :
678 0 : req = tr->req;
679 :
680 0 : spdk_trace_record(TRACE_NVME_PCIE_COMPLETE, qpair->id, 0, (uintptr_t)req, req->cb_arg,
681 : (uint32_t)req->cmd.cid, (uint32_t)cpl->status_raw, pqpair->qpair.queue_depth);
682 :
683 0 : assert(req != NULL);
684 :
685 0 : error = spdk_nvme_cpl_is_error(cpl);
686 0 : retry = error && nvme_completion_is_retry(cpl) &&
687 0 : req->retries < pqpair->retry_count;
688 0 : print_error = error && print_on_error && !qpair->ctrlr->opts.disable_error_logging;
689 :
690 0 : if (print_error) {
691 0 : spdk_nvme_qpair_print_command(qpair, &req->cmd);
692 : }
693 :
694 0 : if (print_error || SPDK_DEBUGLOG_FLAG_ENABLED("nvme")) {
695 0 : spdk_nvme_qpair_print_completion(qpair, cpl);
696 : }
697 :
698 0 : assert(cpl->cid == req->cmd.cid);
699 :
700 0 : if (retry) {
701 0 : req->retries++;
702 0 : nvme_pcie_qpair_submit_tracker(qpair, tr);
703 : } else {
704 0 : TAILQ_REMOVE(&pqpair->outstanding_tr, tr, tq_list);
705 0 : pqpair->qpair.queue_depth--;
706 :
707 : /* Only check admin requests from different processes. */
708 0 : if (nvme_qpair_is_admin_queue(qpair) && req->pid != getpid()) {
709 0 : nvme_pcie_qpair_insert_pending_admin_request(qpair, req, cpl);
710 : } else {
711 0 : nvme_complete_request(tr->cb_fn, tr->cb_arg, qpair, req, cpl);
712 : }
713 :
714 0 : tr->req = NULL;
715 :
716 0 : TAILQ_INSERT_HEAD(&pqpair->free_tr, tr, tq_list);
717 : }
718 0 : }
719 :
720 : void
721 0 : nvme_pcie_qpair_manual_complete_tracker(struct spdk_nvme_qpair *qpair,
722 : struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr,
723 : bool print_on_error)
724 : {
725 0 : struct spdk_nvme_cpl cpl;
726 :
727 0 : memset(&cpl, 0, sizeof(cpl));
728 0 : cpl.sqid = qpair->id;
729 0 : cpl.cid = tr->cid;
730 0 : cpl.status.sct = sct;
731 0 : cpl.status.sc = sc;
732 0 : cpl.status.dnr = dnr;
733 0 : nvme_pcie_qpair_complete_tracker(qpair, tr, &cpl, print_on_error);
734 0 : }
735 :
736 : void
737 0 : nvme_pcie_qpair_abort_trackers(struct spdk_nvme_qpair *qpair, uint32_t dnr)
738 : {
739 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
740 : struct nvme_tracker *tr, *temp, *last;
741 :
742 0 : last = TAILQ_LAST(&pqpair->outstanding_tr, nvme_outstanding_tr_head);
743 :
744 : /* Abort previously submitted (outstanding) trs */
745 0 : TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, temp) {
746 0 : if (!qpair->ctrlr->opts.disable_error_logging) {
747 0 : SPDK_ERRLOG("aborting outstanding command\n");
748 : }
749 0 : nvme_pcie_qpair_manual_complete_tracker(qpair, tr, SPDK_NVME_SCT_GENERIC,
750 : SPDK_NVME_SC_ABORTED_BY_REQUEST, dnr, true);
751 :
752 0 : if (tr == last) {
753 0 : break;
754 : }
755 : }
756 0 : }
757 :
758 : void
759 1 : nvme_pcie_admin_qpair_abort_aers(struct spdk_nvme_qpair *qpair)
760 : {
761 1 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
762 : struct nvme_tracker *tr;
763 :
764 1 : tr = TAILQ_FIRST(&pqpair->outstanding_tr);
765 1 : while (tr != NULL) {
766 0 : assert(tr->req != NULL);
767 0 : if (tr->req->cmd.opc == SPDK_NVME_OPC_ASYNC_EVENT_REQUEST) {
768 0 : nvme_pcie_qpair_manual_complete_tracker(qpair, tr,
769 : SPDK_NVME_SCT_GENERIC, SPDK_NVME_SC_ABORTED_SQ_DELETION, 0,
770 : false);
771 0 : tr = TAILQ_FIRST(&pqpair->outstanding_tr);
772 : } else {
773 0 : tr = TAILQ_NEXT(tr, tq_list);
774 : }
775 : }
776 1 : }
777 :
778 : void
779 1 : nvme_pcie_admin_qpair_destroy(struct spdk_nvme_qpair *qpair)
780 : {
781 1 : nvme_pcie_admin_qpair_abort_aers(qpair);
782 1 : }
783 :
784 : void
785 0 : nvme_pcie_qpair_abort_reqs(struct spdk_nvme_qpair *qpair, uint32_t dnr)
786 : {
787 0 : nvme_pcie_qpair_abort_trackers(qpair, dnr);
788 0 : }
789 :
790 : static void
791 0 : nvme_pcie_qpair_check_timeout(struct spdk_nvme_qpair *qpair)
792 : {
793 : uint64_t t02;
794 : struct nvme_tracker *tr, *tmp;
795 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
796 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
797 : struct spdk_nvme_ctrlr_process *active_proc;
798 :
799 : /* Don't check timeouts during controller initialization. */
800 0 : if (ctrlr->state != NVME_CTRLR_STATE_READY) {
801 0 : return;
802 : }
803 :
804 0 : if (nvme_qpair_is_admin_queue(qpair)) {
805 0 : active_proc = nvme_ctrlr_get_current_process(ctrlr);
806 : } else {
807 0 : active_proc = qpair->active_proc;
808 : }
809 :
810 : /* Only check timeouts if the current process has a timeout callback. */
811 0 : if (active_proc == NULL || active_proc->timeout_cb_fn == NULL) {
812 0 : return;
813 : }
814 :
815 0 : t02 = spdk_get_ticks();
816 0 : TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, tmp) {
817 0 : assert(tr->req != NULL);
818 :
819 0 : if (nvme_request_check_timeout(tr->req, tr->cid, active_proc, t02)) {
820 : /*
821 : * The requests are in order, so as soon as one has not timed out,
822 : * stop iterating.
823 : */
824 0 : break;
825 : }
826 : }
827 : }
828 :
829 : int32_t
830 0 : nvme_pcie_qpair_process_completions(struct spdk_nvme_qpair *qpair, uint32_t max_completions)
831 : {
832 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
833 : struct nvme_tracker *tr;
834 : struct spdk_nvme_cpl *cpl, *next_cpl;
835 0 : uint32_t num_completions = 0;
836 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
837 : uint16_t next_cq_head;
838 : uint8_t next_phase;
839 0 : bool next_is_valid = false;
840 : int rc;
841 :
842 0 : if (spdk_unlikely(pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED)) {
843 0 : return -ENXIO;
844 : }
845 :
846 0 : if (spdk_unlikely(nvme_qpair_get_state(qpair) == NVME_QPAIR_CONNECTING)) {
847 0 : if (pqpair->pcie_state == NVME_PCIE_QPAIR_READY) {
848 : /* It is possible that another thread set the pcie_state to
849 : * QPAIR_READY, if it polled the adminq and processed the SQ
850 : * completion for this qpair. So check for that condition
851 : * here and then update the qpair's state to CONNECTED, since
852 : * we can only set the qpair state from the qpair's thread.
853 : * (Note: this fixed issue #2157.)
854 : */
855 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_CONNECTED);
856 0 : } else if (pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED) {
857 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED);
858 0 : return -ENXIO;
859 : } else {
860 0 : rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
861 0 : if (rc < 0) {
862 0 : return rc;
863 0 : } else if (pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED) {
864 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED);
865 0 : return -ENXIO;
866 : }
867 : }
868 0 : return 0;
869 : }
870 :
871 0 : if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) {
872 0 : nvme_ctrlr_lock(ctrlr);
873 : }
874 :
875 0 : if (max_completions == 0 || max_completions > pqpair->max_completions_cap) {
876 : /*
877 : * max_completions == 0 means unlimited, but complete at most
878 : * max_completions_cap batch of I/O at a time so that the completion
879 : * queue doorbells don't wrap around.
880 : */
881 0 : max_completions = pqpair->max_completions_cap;
882 : }
883 :
884 0 : pqpair->stat->polls++;
885 :
886 : while (1) {
887 0 : cpl = &pqpair->cpl[pqpair->cq_head];
888 :
889 0 : if (!next_is_valid && cpl->status.p != pqpair->flags.phase) {
890 0 : break;
891 : }
892 :
893 0 : if (spdk_likely(pqpair->cq_head + 1 != pqpair->num_entries)) {
894 0 : next_cq_head = pqpair->cq_head + 1;
895 0 : next_phase = pqpair->flags.phase;
896 : } else {
897 0 : next_cq_head = 0;
898 0 : next_phase = !pqpair->flags.phase;
899 : }
900 0 : next_cpl = &pqpair->cpl[next_cq_head];
901 0 : next_is_valid = (next_cpl->status.p == next_phase);
902 0 : if (next_is_valid) {
903 0 : __builtin_prefetch(&pqpair->tr[next_cpl->cid]);
904 : }
905 :
906 : #if defined(__PPC64__) || defined(__riscv) || defined(__loongarch__)
907 : /*
908 : * This memory barrier prevents reordering of:
909 : * - load after store from/to tr
910 : * - load after load cpl phase and cpl cid
911 : */
912 : spdk_mb();
913 : #elif defined(__aarch64__)
914 : __asm volatile("dmb oshld" ::: "memory");
915 : #endif
916 :
917 0 : if (spdk_unlikely(++pqpair->cq_head == pqpair->num_entries)) {
918 0 : pqpair->cq_head = 0;
919 0 : pqpair->flags.phase = !pqpair->flags.phase;
920 : }
921 :
922 0 : tr = &pqpair->tr[cpl->cid];
923 0 : pqpair->sq_head = cpl->sqhd;
924 :
925 0 : if (tr->req) {
926 : /* Prefetch the req's STAILQ_ENTRY since we'll need to access it
927 : * as part of putting the req back on the qpair's free list.
928 : */
929 0 : __builtin_prefetch(&tr->req->stailq);
930 0 : nvme_pcie_qpair_complete_tracker(qpair, tr, cpl, true);
931 : } else {
932 0 : SPDK_ERRLOG("cpl does not map to outstanding cmd\n");
933 0 : spdk_nvme_qpair_print_completion(qpair, cpl);
934 0 : assert(0);
935 : }
936 :
937 0 : if (++num_completions == max_completions) {
938 0 : break;
939 : }
940 : }
941 :
942 0 : if (num_completions > 0) {
943 0 : pqpair->stat->completions += num_completions;
944 0 : nvme_pcie_qpair_ring_cq_doorbell(qpair);
945 : } else {
946 0 : pqpair->stat->idle_polls++;
947 : }
948 :
949 0 : if (pqpair->flags.delay_cmd_submit) {
950 0 : if (pqpair->last_sq_tail != pqpair->sq_tail) {
951 0 : nvme_pcie_qpair_ring_sq_doorbell(qpair);
952 0 : pqpair->last_sq_tail = pqpair->sq_tail;
953 : }
954 : }
955 :
956 0 : if (spdk_unlikely(ctrlr->timeout_enabled)) {
957 : /*
958 : * User registered for timeout callback
959 : */
960 0 : nvme_pcie_qpair_check_timeout(qpair);
961 : }
962 :
963 : /* Before returning, complete any pending admin request or
964 : * process the admin qpair disconnection.
965 : */
966 0 : if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) {
967 0 : nvme_pcie_qpair_complete_pending_admin_request(qpair);
968 :
969 0 : if (nvme_qpair_get_state(qpair) == NVME_QPAIR_DISCONNECTING) {
970 0 : rc = nvme_ctrlr_disable_poll(qpair->ctrlr);
971 0 : if (rc != -EAGAIN) {
972 0 : nvme_transport_ctrlr_disconnect_qpair_done(qpair);
973 : }
974 : }
975 :
976 0 : nvme_ctrlr_unlock(ctrlr);
977 : }
978 :
979 0 : if (spdk_unlikely(pqpair->flags.has_pending_vtophys_failures)) {
980 : struct nvme_tracker *tr, *tmp;
981 :
982 0 : TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, tmp) {
983 0 : if (tr->bad_vtophys) {
984 0 : tr->bad_vtophys = 0;
985 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
986 : }
987 : }
988 0 : pqpair->flags.has_pending_vtophys_failures = 0;
989 : }
990 :
991 0 : return num_completions;
992 : }
993 :
994 : int
995 4 : nvme_pcie_qpair_destroy(struct spdk_nvme_qpair *qpair)
996 : {
997 4 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
998 :
999 4 : if (nvme_qpair_is_admin_queue(qpair)) {
1000 1 : nvme_pcie_admin_qpair_destroy(qpair);
1001 : }
1002 : /*
1003 : * We check sq_vaddr and cq_vaddr to see if the user specified the memory
1004 : * buffers when creating the I/O queue.
1005 : * If the user specified them, we cannot free that memory.
1006 : * Nor do we free it if it's in the CMB.
1007 : */
1008 4 : if (!pqpair->sq_vaddr && pqpair->cmd && !pqpair->sq_in_cmb) {
1009 2 : spdk_free(pqpair->cmd);
1010 : }
1011 4 : if (!pqpair->cq_vaddr && pqpair->cpl) {
1012 2 : spdk_free(pqpair->cpl);
1013 : }
1014 4 : if (pqpair->tr) {
1015 4 : spdk_free(pqpair->tr);
1016 : }
1017 :
1018 4 : nvme_qpair_deinit(qpair);
1019 :
1020 4 : if (!pqpair->shared_stats && (!qpair->active_proc ||
1021 0 : qpair->active_proc == nvme_ctrlr_get_current_process(qpair->ctrlr))) {
1022 4 : if (qpair->id) {
1023 3 : free(pqpair->stat);
1024 : } else {
1025 : /* statistics of admin qpair are allocates from huge pages because
1026 : * admin qpair is shared for multi-process */
1027 1 : spdk_free(pqpair->stat);
1028 : }
1029 :
1030 : }
1031 :
1032 4 : spdk_free(pqpair);
1033 :
1034 4 : return 0;
1035 : }
1036 :
1037 : struct spdk_nvme_qpair *
1038 0 : nvme_pcie_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, uint16_t qid,
1039 : const struct spdk_nvme_io_qpair_opts *opts)
1040 : {
1041 : struct nvme_pcie_qpair *pqpair;
1042 : struct spdk_nvme_qpair *qpair;
1043 : int rc;
1044 :
1045 0 : assert(ctrlr != NULL);
1046 :
1047 0 : pqpair = spdk_zmalloc(sizeof(*pqpair), 64, NULL,
1048 : SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE);
1049 0 : if (pqpair == NULL) {
1050 0 : return NULL;
1051 : }
1052 :
1053 0 : pqpair->num_entries = opts->io_queue_size;
1054 0 : pqpair->flags.delay_cmd_submit = opts->delay_cmd_submit;
1055 :
1056 0 : qpair = &pqpair->qpair;
1057 :
1058 0 : rc = nvme_qpair_init(qpair, qid, ctrlr, opts->qprio, opts->io_queue_requests, opts->async_mode);
1059 0 : if (rc != 0) {
1060 0 : nvme_pcie_qpair_destroy(qpair);
1061 0 : return NULL;
1062 : }
1063 :
1064 0 : rc = nvme_pcie_qpair_construct(qpair, opts);
1065 :
1066 0 : if (rc != 0) {
1067 0 : nvme_pcie_qpair_destroy(qpair);
1068 0 : return NULL;
1069 : }
1070 :
1071 0 : return qpair;
1072 : }
1073 :
1074 : int
1075 0 : nvme_pcie_ctrlr_delete_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair)
1076 : {
1077 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
1078 : struct nvme_completion_poll_status *status;
1079 : int rc;
1080 :
1081 0 : assert(ctrlr != NULL);
1082 :
1083 0 : if (ctrlr->is_removed) {
1084 0 : goto free;
1085 : }
1086 :
1087 0 : if (ctrlr->prepare_for_reset) {
1088 0 : if (nvme_qpair_get_state(qpair) == NVME_QPAIR_CONNECTING) {
1089 0 : pqpair->flags.defer_destruction = true;
1090 : }
1091 0 : goto clear_shadow_doorbells;
1092 : }
1093 :
1094 : /* If attempting to delete a qpair that's still being connected, we have to wait until it's
1095 : * finished, so that we don't free it while it's waiting for the create cq/sq callbacks.
1096 : */
1097 0 : while (pqpair->pcie_state == NVME_PCIE_QPAIR_WAIT_FOR_CQ ||
1098 0 : pqpair->pcie_state == NVME_PCIE_QPAIR_WAIT_FOR_SQ) {
1099 0 : rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
1100 0 : if (rc < 0) {
1101 0 : break;
1102 : }
1103 : }
1104 :
1105 0 : status = calloc(1, sizeof(*status));
1106 0 : if (!status) {
1107 0 : SPDK_ERRLOG("Failed to allocate status tracker\n");
1108 0 : goto free;
1109 : }
1110 :
1111 : /* Delete the I/O submission queue */
1112 0 : rc = nvme_pcie_ctrlr_cmd_delete_io_sq(ctrlr, qpair, nvme_completion_poll_cb, status);
1113 0 : if (rc != 0) {
1114 0 : SPDK_ERRLOG("Failed to send request to delete_io_sq with rc=%d\n", rc);
1115 0 : free(status);
1116 0 : goto free;
1117 : }
1118 0 : if (nvme_wait_for_completion(ctrlr->adminq, status)) {
1119 0 : if (!status->timed_out) {
1120 0 : free(status);
1121 : }
1122 0 : goto free;
1123 : }
1124 :
1125 : /* Now that the submission queue is deleted, the device is supposed to have
1126 : * completed any outstanding I/O. Try to complete them. If they don't complete,
1127 : * they'll be marked as aborted and completed below. */
1128 0 : if (qpair->active_proc == nvme_ctrlr_get_current_process(ctrlr)) {
1129 0 : nvme_pcie_qpair_process_completions(qpair, 0);
1130 : }
1131 :
1132 0 : memset(status, 0, sizeof(*status));
1133 : /* Delete the completion queue */
1134 0 : rc = nvme_pcie_ctrlr_cmd_delete_io_cq(ctrlr, qpair, nvme_completion_poll_cb, status);
1135 0 : if (rc != 0) {
1136 0 : SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc);
1137 0 : free(status);
1138 0 : goto free;
1139 : }
1140 0 : if (nvme_wait_for_completion(ctrlr->adminq, status)) {
1141 0 : if (!status->timed_out) {
1142 0 : free(status);
1143 : }
1144 0 : goto free;
1145 : }
1146 0 : free(status);
1147 :
1148 0 : clear_shadow_doorbells:
1149 0 : if (pqpair->flags.has_shadow_doorbell && ctrlr->shadow_doorbell) {
1150 0 : *pqpair->shadow_doorbell.sq_tdbl = 0;
1151 0 : *pqpair->shadow_doorbell.cq_hdbl = 0;
1152 0 : *pqpair->shadow_doorbell.sq_eventidx = 0;
1153 0 : *pqpair->shadow_doorbell.cq_eventidx = 0;
1154 : }
1155 0 : free:
1156 0 : if (qpair->no_deletion_notification_needed == 0) {
1157 : /* Abort the rest of the I/O */
1158 0 : nvme_pcie_qpair_abort_trackers(qpair, 1);
1159 : }
1160 :
1161 0 : if (!pqpair->flags.defer_destruction) {
1162 0 : nvme_pcie_qpair_destroy(qpair);
1163 : }
1164 0 : return 0;
1165 : }
1166 :
1167 : static void
1168 3 : nvme_pcie_fail_request_bad_vtophys(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr)
1169 : {
1170 3 : if (!qpair->in_completion_context) {
1171 3 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
1172 :
1173 3 : tr->bad_vtophys = 1;
1174 3 : pqpair->flags.has_pending_vtophys_failures = 1;
1175 3 : return;
1176 : }
1177 :
1178 : /*
1179 : * Bad vtophys translation, so abort this request and return
1180 : * immediately.
1181 : */
1182 0 : SPDK_ERRLOG("vtophys or other payload buffer related error\n");
1183 0 : nvme_pcie_qpair_manual_complete_tracker(qpair, tr, SPDK_NVME_SCT_GENERIC,
1184 : SPDK_NVME_SC_INVALID_FIELD,
1185 : 1 /* do not retry */, true);
1186 : }
1187 :
1188 : /*
1189 : * Append PRP list entries to describe a virtually contiguous buffer starting at virt_addr of len bytes.
1190 : *
1191 : * *prp_index will be updated to account for the number of PRP entries used.
1192 : */
1193 : static inline int
1194 25 : nvme_pcie_prp_list_append(struct spdk_nvme_ctrlr *ctrlr, struct nvme_tracker *tr,
1195 : uint32_t *prp_index, void *virt_addr, size_t len,
1196 : uint32_t page_size)
1197 : {
1198 25 : struct spdk_nvme_cmd *cmd = &tr->req->cmd;
1199 25 : uintptr_t page_mask = page_size - 1;
1200 : uint64_t phys_addr;
1201 : uint32_t i;
1202 :
1203 25 : SPDK_DEBUGLOG(nvme, "prp_index:%u virt_addr:%p len:%u\n",
1204 : *prp_index, virt_addr, (uint32_t)len);
1205 :
1206 25 : if (spdk_unlikely(((uintptr_t)virt_addr & 3) != 0)) {
1207 2 : SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr);
1208 2 : return -EFAULT;
1209 : }
1210 :
1211 23 : i = *prp_index;
1212 2070 : while (len) {
1213 : uint32_t seg_len;
1214 :
1215 : /*
1216 : * prp_index 0 is stored in prp1, and the rest are stored in the prp[] array,
1217 : * so prp_index == count is valid.
1218 : */
1219 2051 : if (spdk_unlikely(i > SPDK_COUNTOF(tr->u.prp))) {
1220 2 : SPDK_ERRLOG("out of PRP entries\n");
1221 2 : return -EFAULT;
1222 : }
1223 :
1224 2049 : phys_addr = nvme_pcie_vtophys(ctrlr, virt_addr, NULL);
1225 2049 : if (spdk_unlikely(phys_addr == SPDK_VTOPHYS_ERROR)) {
1226 1 : SPDK_ERRLOG("vtophys(%p) failed\n", virt_addr);
1227 1 : return -EFAULT;
1228 : }
1229 :
1230 2048 : if (i == 0) {
1231 19 : SPDK_DEBUGLOG(nvme, "prp1 = %p\n", (void *)phys_addr);
1232 19 : cmd->dptr.prp.prp1 = phys_addr;
1233 19 : seg_len = page_size - ((uintptr_t)virt_addr & page_mask);
1234 : } else {
1235 2029 : if ((phys_addr & page_mask) != 0) {
1236 1 : SPDK_ERRLOG("PRP %u not page aligned (%p)\n", i, virt_addr);
1237 1 : return -EFAULT;
1238 : }
1239 :
1240 2028 : SPDK_DEBUGLOG(nvme, "prp[%u] = %p\n", i - 1, (void *)phys_addr);
1241 2028 : tr->u.prp[i - 1] = phys_addr;
1242 2028 : seg_len = page_size;
1243 : }
1244 :
1245 2047 : seg_len = spdk_min(seg_len, len);
1246 2047 : virt_addr = (uint8_t *)virt_addr + seg_len;
1247 2047 : len -= seg_len;
1248 2047 : i++;
1249 : }
1250 :
1251 19 : cmd->psdt = SPDK_NVME_PSDT_PRP;
1252 19 : if (i <= 1) {
1253 6 : cmd->dptr.prp.prp2 = 0;
1254 13 : } else if (i == 2) {
1255 6 : cmd->dptr.prp.prp2 = tr->u.prp[0];
1256 6 : SPDK_DEBUGLOG(nvme, "prp2 = %p\n", (void *)cmd->dptr.prp.prp2);
1257 : } else {
1258 7 : cmd->dptr.prp.prp2 = tr->prp_sgl_bus_addr;
1259 7 : SPDK_DEBUGLOG(nvme, "prp2 = %p (PRP list)\n", (void *)cmd->dptr.prp.prp2);
1260 : }
1261 :
1262 19 : *prp_index = i;
1263 19 : return 0;
1264 : }
1265 :
1266 : static int
1267 0 : nvme_pcie_qpair_build_request_invalid(struct spdk_nvme_qpair *qpair,
1268 : struct nvme_request *req, struct nvme_tracker *tr, bool dword_aligned)
1269 : {
1270 0 : assert(0);
1271 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1272 : return -EINVAL;
1273 : }
1274 :
1275 : /**
1276 : * Build PRP list describing physically contiguous payload buffer.
1277 : */
1278 : static int
1279 4 : nvme_pcie_qpair_build_contig_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req,
1280 : struct nvme_tracker *tr, bool dword_aligned)
1281 : {
1282 4 : uint32_t prp_index = 0;
1283 : int rc;
1284 :
1285 4 : rc = nvme_pcie_prp_list_append(qpair->ctrlr, tr, &prp_index,
1286 4 : (uint8_t *)req->payload.contig_or_cb_arg + req->payload_offset,
1287 4 : req->payload_size, qpair->ctrlr->page_size);
1288 4 : if (rc) {
1289 1 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1290 : }
1291 :
1292 4 : return rc;
1293 : }
1294 :
1295 : /**
1296 : * Build an SGL describing a physically contiguous payload buffer.
1297 : *
1298 : * This is more efficient than using PRP because large buffers can be
1299 : * described this way.
1300 : */
1301 : static int
1302 3 : nvme_pcie_qpair_build_contig_hw_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req,
1303 : struct nvme_tracker *tr, bool dword_aligned)
1304 : {
1305 : uint8_t *virt_addr;
1306 3 : uint64_t phys_addr, mapping_length;
1307 : uint32_t length;
1308 : struct spdk_nvme_sgl_descriptor *sgl;
1309 3 : uint32_t nseg = 0;
1310 :
1311 3 : assert(req->payload_size != 0);
1312 3 : assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_CONTIG);
1313 :
1314 3 : sgl = tr->u.sgl;
1315 3 : req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_CONTIG;
1316 3 : req->cmd.dptr.sgl1.unkeyed.subtype = 0;
1317 :
1318 3 : length = req->payload_size;
1319 : /* ubsan complains about applying zero offset to null pointer if contig_or_cb_arg is NULL,
1320 : * so just double cast it to make it go away */
1321 3 : virt_addr = (uint8_t *)((uintptr_t)req->payload.contig_or_cb_arg + req->payload_offset);
1322 :
1323 7 : while (length > 0) {
1324 4 : if (nseg >= NVME_MAX_SGL_DESCRIPTORS) {
1325 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1326 0 : return -EFAULT;
1327 : }
1328 :
1329 4 : if (dword_aligned && ((uintptr_t)virt_addr & 3)) {
1330 0 : SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr);
1331 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1332 0 : return -EFAULT;
1333 : }
1334 :
1335 4 : mapping_length = length;
1336 4 : phys_addr = nvme_pcie_vtophys(qpair->ctrlr, virt_addr, &mapping_length);
1337 4 : if (phys_addr == SPDK_VTOPHYS_ERROR) {
1338 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1339 0 : return -EFAULT;
1340 : }
1341 :
1342 4 : mapping_length = spdk_min(length, mapping_length);
1343 :
1344 4 : length -= mapping_length;
1345 4 : virt_addr += mapping_length;
1346 :
1347 4 : sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1348 4 : sgl->unkeyed.length = mapping_length;
1349 4 : sgl->address = phys_addr;
1350 4 : sgl->unkeyed.subtype = 0;
1351 :
1352 4 : sgl++;
1353 4 : nseg++;
1354 : }
1355 :
1356 3 : if (nseg == 1) {
1357 : /*
1358 : * The whole transfer can be described by a single SGL descriptor.
1359 : * Use the special case described by the spec where SGL1's type is Data Block.
1360 : * This means the SGL in the tracker is not used at all, so copy the first (and only)
1361 : * SGL element into SGL1.
1362 : */
1363 2 : req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1364 2 : req->cmd.dptr.sgl1.address = tr->u.sgl[0].address;
1365 2 : req->cmd.dptr.sgl1.unkeyed.length = tr->u.sgl[0].unkeyed.length;
1366 : } else {
1367 : /* SPDK NVMe driver supports only 1 SGL segment for now, it is enough because
1368 : * NVME_MAX_SGL_DESCRIPTORS * 16 is less than one page.
1369 : */
1370 1 : req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT;
1371 1 : req->cmd.dptr.sgl1.address = tr->prp_sgl_bus_addr;
1372 1 : req->cmd.dptr.sgl1.unkeyed.length = nseg * sizeof(struct spdk_nvme_sgl_descriptor);
1373 : }
1374 :
1375 3 : return 0;
1376 : }
1377 :
1378 : /**
1379 : * Build SGL list describing scattered payload buffer.
1380 : */
1381 : static int
1382 2 : nvme_pcie_qpair_build_hw_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req,
1383 : struct nvme_tracker *tr, bool dword_aligned)
1384 : {
1385 : int rc;
1386 2 : void *virt_addr;
1387 2 : uint64_t phys_addr, mapping_length;
1388 2 : uint32_t remaining_transfer_len, remaining_user_sge_len, length;
1389 : struct spdk_nvme_sgl_descriptor *sgl;
1390 2 : uint32_t nseg = 0;
1391 :
1392 : /*
1393 : * Build scattered payloads.
1394 : */
1395 2 : assert(req->payload_size != 0);
1396 2 : assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_SGL);
1397 2 : assert(req->payload.reset_sgl_fn != NULL);
1398 2 : assert(req->payload.next_sge_fn != NULL);
1399 2 : req->payload.reset_sgl_fn(req->payload.contig_or_cb_arg, req->payload_offset);
1400 :
1401 2 : sgl = tr->u.sgl;
1402 2 : req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_CONTIG;
1403 2 : req->cmd.dptr.sgl1.unkeyed.subtype = 0;
1404 :
1405 2 : remaining_transfer_len = req->payload_size;
1406 :
1407 6 : while (remaining_transfer_len > 0) {
1408 4 : rc = req->payload.next_sge_fn(req->payload.contig_or_cb_arg,
1409 : &virt_addr, &remaining_user_sge_len);
1410 4 : if (rc) {
1411 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1412 0 : return -EFAULT;
1413 : }
1414 :
1415 : /* Bit Bucket SGL descriptor */
1416 4 : if ((uint64_t)virt_addr == UINT64_MAX) {
1417 : /* TODO: enable WRITE and COMPARE when necessary */
1418 0 : if (req->cmd.opc != SPDK_NVME_OPC_READ) {
1419 0 : SPDK_ERRLOG("Only READ command can be supported\n");
1420 0 : goto exit;
1421 : }
1422 0 : if (nseg >= NVME_MAX_SGL_DESCRIPTORS) {
1423 0 : SPDK_ERRLOG("Too many SGL entries\n");
1424 0 : goto exit;
1425 : }
1426 :
1427 0 : sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_BIT_BUCKET;
1428 : /* If the SGL describes a destination data buffer, the length of data
1429 : * buffer shall be discarded by controller, and the length is included
1430 : * in Number of Logical Blocks (NLB) parameter. Otherwise, the length
1431 : * is not included in the NLB parameter.
1432 : */
1433 0 : remaining_user_sge_len = spdk_min(remaining_user_sge_len, remaining_transfer_len);
1434 0 : remaining_transfer_len -= remaining_user_sge_len;
1435 :
1436 0 : sgl->unkeyed.length = remaining_user_sge_len;
1437 0 : sgl->address = 0;
1438 0 : sgl->unkeyed.subtype = 0;
1439 :
1440 0 : sgl++;
1441 0 : nseg++;
1442 :
1443 0 : continue;
1444 : }
1445 :
1446 4 : remaining_user_sge_len = spdk_min(remaining_user_sge_len, remaining_transfer_len);
1447 4 : remaining_transfer_len -= remaining_user_sge_len;
1448 8 : while (remaining_user_sge_len > 0) {
1449 4 : if (nseg >= NVME_MAX_SGL_DESCRIPTORS) {
1450 0 : SPDK_ERRLOG("Too many SGL entries\n");
1451 0 : goto exit;
1452 : }
1453 :
1454 4 : if (dword_aligned && ((uintptr_t)virt_addr & 3)) {
1455 0 : SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr);
1456 0 : goto exit;
1457 : }
1458 :
1459 4 : mapping_length = remaining_user_sge_len;
1460 4 : phys_addr = nvme_pcie_vtophys(qpair->ctrlr, virt_addr, &mapping_length);
1461 4 : if (phys_addr == SPDK_VTOPHYS_ERROR) {
1462 0 : goto exit;
1463 : }
1464 :
1465 4 : length = spdk_min(remaining_user_sge_len, mapping_length);
1466 4 : remaining_user_sge_len -= length;
1467 4 : virt_addr = (uint8_t *)virt_addr + length;
1468 :
1469 4 : if (nseg > 0 && phys_addr ==
1470 2 : (*(sgl - 1)).address + (*(sgl - 1)).unkeyed.length) {
1471 : /* extend previous entry */
1472 0 : (*(sgl - 1)).unkeyed.length += length;
1473 0 : continue;
1474 : }
1475 :
1476 4 : sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1477 4 : sgl->unkeyed.length = length;
1478 4 : sgl->address = phys_addr;
1479 4 : sgl->unkeyed.subtype = 0;
1480 :
1481 4 : sgl++;
1482 4 : nseg++;
1483 : }
1484 : }
1485 :
1486 2 : if (nseg == 1) {
1487 : /*
1488 : * The whole transfer can be described by a single SGL descriptor.
1489 : * Use the special case described by the spec where SGL1's type is Data Block.
1490 : * This means the SGL in the tracker is not used at all, so copy the first (and only)
1491 : * SGL element into SGL1.
1492 : */
1493 1 : req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1494 1 : req->cmd.dptr.sgl1.address = tr->u.sgl[0].address;
1495 1 : req->cmd.dptr.sgl1.unkeyed.length = tr->u.sgl[0].unkeyed.length;
1496 : } else {
1497 : /* SPDK NVMe driver supports only 1 SGL segment for now, it is enough because
1498 : * NVME_MAX_SGL_DESCRIPTORS * 16 is less than one page.
1499 : */
1500 1 : req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT;
1501 1 : req->cmd.dptr.sgl1.address = tr->prp_sgl_bus_addr;
1502 1 : req->cmd.dptr.sgl1.unkeyed.length = nseg * sizeof(struct spdk_nvme_sgl_descriptor);
1503 : }
1504 :
1505 2 : return 0;
1506 :
1507 0 : exit:
1508 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1509 0 : return -EFAULT;
1510 : }
1511 :
1512 : /**
1513 : * Build PRP list describing scattered payload buffer.
1514 : */
1515 : static int
1516 1 : nvme_pcie_qpair_build_prps_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req,
1517 : struct nvme_tracker *tr, bool dword_aligned)
1518 : {
1519 : int rc;
1520 1 : void *virt_addr;
1521 1 : uint32_t remaining_transfer_len, length;
1522 1 : uint32_t prp_index = 0;
1523 1 : uint32_t page_size = qpair->ctrlr->page_size;
1524 :
1525 : /*
1526 : * Build scattered payloads.
1527 : */
1528 1 : assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_SGL);
1529 1 : assert(req->payload.reset_sgl_fn != NULL);
1530 1 : req->payload.reset_sgl_fn(req->payload.contig_or_cb_arg, req->payload_offset);
1531 :
1532 1 : remaining_transfer_len = req->payload_size;
1533 2 : while (remaining_transfer_len > 0) {
1534 1 : assert(req->payload.next_sge_fn != NULL);
1535 1 : rc = req->payload.next_sge_fn(req->payload.contig_or_cb_arg, &virt_addr, &length);
1536 1 : if (rc) {
1537 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1538 0 : return -EFAULT;
1539 : }
1540 :
1541 1 : length = spdk_min(remaining_transfer_len, length);
1542 :
1543 : /*
1544 : * Any incompatible sges should have been handled up in the splitting routine,
1545 : * but assert here as an additional check.
1546 : *
1547 : * All SGEs except last must end on a page boundary.
1548 : */
1549 1 : assert((length == remaining_transfer_len) ||
1550 : _is_page_aligned((uintptr_t)virt_addr + length, page_size));
1551 :
1552 1 : rc = nvme_pcie_prp_list_append(qpair->ctrlr, tr, &prp_index, virt_addr, length, page_size);
1553 1 : if (rc) {
1554 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1555 0 : return rc;
1556 : }
1557 :
1558 1 : remaining_transfer_len -= length;
1559 : }
1560 :
1561 1 : return 0;
1562 : }
1563 :
1564 : typedef int(*build_req_fn)(struct spdk_nvme_qpair *, struct nvme_request *, struct nvme_tracker *,
1565 : bool);
1566 :
1567 : static build_req_fn const g_nvme_pcie_build_req_table[][2] = {
1568 : [NVME_PAYLOAD_TYPE_INVALID] = {
1569 : nvme_pcie_qpair_build_request_invalid, /* PRP */
1570 : nvme_pcie_qpair_build_request_invalid /* SGL */
1571 : },
1572 : [NVME_PAYLOAD_TYPE_CONTIG] = {
1573 : nvme_pcie_qpair_build_contig_request, /* PRP */
1574 : nvme_pcie_qpair_build_contig_hw_sgl_request /* SGL */
1575 : },
1576 : [NVME_PAYLOAD_TYPE_SGL] = {
1577 : nvme_pcie_qpair_build_prps_sgl_request, /* PRP */
1578 : nvme_pcie_qpair_build_hw_sgl_request /* SGL */
1579 : }
1580 : };
1581 :
1582 : static int
1583 5 : nvme_pcie_qpair_build_metadata(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr,
1584 : bool sgl_supported, bool mptr_sgl_supported, bool dword_aligned)
1585 : {
1586 : void *md_payload;
1587 5 : struct nvme_request *req = tr->req;
1588 5 : uint64_t mapping_length;
1589 :
1590 5 : if (req->payload.md) {
1591 5 : md_payload = (uint8_t *)req->payload.md + req->md_offset;
1592 5 : if (dword_aligned && ((uintptr_t)md_payload & 3)) {
1593 0 : SPDK_ERRLOG("virt_addr %p not dword aligned\n", md_payload);
1594 0 : goto exit;
1595 : }
1596 :
1597 5 : mapping_length = req->md_size;
1598 5 : if (sgl_supported && mptr_sgl_supported && dword_aligned) {
1599 2 : assert(req->cmd.psdt == SPDK_NVME_PSDT_SGL_MPTR_CONTIG);
1600 2 : req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_SGL;
1601 :
1602 2 : tr->meta_sgl.address = nvme_pcie_vtophys(qpair->ctrlr, md_payload, &mapping_length);
1603 2 : if (tr->meta_sgl.address == SPDK_VTOPHYS_ERROR || mapping_length != req->md_size) {
1604 1 : goto exit;
1605 : }
1606 1 : tr->meta_sgl.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1607 1 : tr->meta_sgl.unkeyed.length = req->md_size;
1608 1 : tr->meta_sgl.unkeyed.subtype = 0;
1609 1 : req->cmd.mptr = tr->prp_sgl_bus_addr - sizeof(struct spdk_nvme_sgl_descriptor);
1610 : } else {
1611 3 : req->cmd.mptr = nvme_pcie_vtophys(qpair->ctrlr, md_payload, &mapping_length);
1612 3 : if (req->cmd.mptr == SPDK_VTOPHYS_ERROR || mapping_length != req->md_size) {
1613 1 : goto exit;
1614 : }
1615 : }
1616 : }
1617 :
1618 3 : return 0;
1619 :
1620 2 : exit:
1621 2 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1622 2 : return -EINVAL;
1623 : }
1624 :
1625 : int
1626 0 : nvme_pcie_qpair_submit_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req)
1627 : {
1628 : struct nvme_tracker *tr;
1629 0 : int rc = 0;
1630 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
1631 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
1632 : enum nvme_payload_type payload_type;
1633 : bool sgl_supported;
1634 : bool mptr_sgl_supported;
1635 0 : bool dword_aligned = true;
1636 :
1637 0 : if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) {
1638 0 : nvme_ctrlr_lock(ctrlr);
1639 : }
1640 :
1641 0 : tr = TAILQ_FIRST(&pqpair->free_tr);
1642 :
1643 0 : if (tr == NULL) {
1644 0 : pqpair->stat->queued_requests++;
1645 : /* Inform the upper layer to try again later. */
1646 0 : rc = -EAGAIN;
1647 0 : goto exit;
1648 : }
1649 :
1650 0 : pqpair->stat->submitted_requests++;
1651 0 : TAILQ_REMOVE(&pqpair->free_tr, tr, tq_list); /* remove tr from free_tr */
1652 0 : TAILQ_INSERT_TAIL(&pqpair->outstanding_tr, tr, tq_list);
1653 0 : pqpair->qpair.queue_depth++;
1654 0 : tr->req = req;
1655 0 : tr->cb_fn = req->cb_fn;
1656 0 : tr->cb_arg = req->cb_arg;
1657 0 : req->cmd.cid = tr->cid;
1658 : /* Use PRP by default. This bit will be overridden below if needed. */
1659 0 : req->cmd.psdt = SPDK_NVME_PSDT_PRP;
1660 :
1661 0 : if (req->payload_size != 0) {
1662 0 : payload_type = nvme_payload_type(&req->payload);
1663 : /* According to the specification, PRPs shall be used for all
1664 : * Admin commands for NVMe over PCIe implementations.
1665 : */
1666 0 : sgl_supported = (ctrlr->flags & SPDK_NVME_CTRLR_SGL_SUPPORTED) != 0 &&
1667 0 : !nvme_qpair_is_admin_queue(qpair);
1668 0 : mptr_sgl_supported = (ctrlr->flags & SPDK_NVME_CTRLR_MPTR_SGL_SUPPORTED) != 0 &&
1669 0 : !nvme_qpair_is_admin_queue(qpair);
1670 :
1671 0 : if (sgl_supported) {
1672 : /* Don't use SGL for DSM command */
1673 0 : if (spdk_unlikely((ctrlr->quirks & NVME_QUIRK_NO_SGL_FOR_DSM) &&
1674 : (req->cmd.opc == SPDK_NVME_OPC_DATASET_MANAGEMENT))) {
1675 0 : sgl_supported = false;
1676 : }
1677 : }
1678 :
1679 0 : if (sgl_supported && !(ctrlr->flags & SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT)) {
1680 0 : dword_aligned = false;
1681 : }
1682 :
1683 : /* If we fail to build the request or the metadata, do not return the -EFAULT back up
1684 : * the stack. This ensures that we always fail these types of requests via a
1685 : * completion callback, and never in the context of the submission.
1686 : */
1687 0 : rc = g_nvme_pcie_build_req_table[payload_type][sgl_supported](qpair, req, tr, dword_aligned);
1688 0 : if (rc < 0) {
1689 0 : assert(rc == -EFAULT);
1690 0 : rc = 0;
1691 0 : goto exit;
1692 : }
1693 :
1694 0 : rc = nvme_pcie_qpair_build_metadata(qpair, tr, sgl_supported, mptr_sgl_supported, dword_aligned);
1695 0 : if (rc < 0) {
1696 0 : assert(rc == -EFAULT);
1697 0 : rc = 0;
1698 0 : goto exit;
1699 : }
1700 : }
1701 :
1702 0 : nvme_pcie_qpair_submit_tracker(qpair, tr);
1703 :
1704 0 : exit:
1705 0 : if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) {
1706 0 : nvme_ctrlr_unlock(ctrlr);
1707 : }
1708 :
1709 0 : return rc;
1710 : }
1711 :
1712 : struct spdk_nvme_transport_poll_group *
1713 1 : nvme_pcie_poll_group_create(void)
1714 : {
1715 1 : struct nvme_pcie_poll_group *group = calloc(1, sizeof(*group));
1716 :
1717 1 : if (group == NULL) {
1718 0 : SPDK_ERRLOG("Unable to allocate poll group.\n");
1719 0 : return NULL;
1720 : }
1721 :
1722 1 : return &group->group;
1723 : }
1724 :
1725 : int
1726 0 : nvme_pcie_poll_group_connect_qpair(struct spdk_nvme_qpair *qpair)
1727 : {
1728 0 : return 0;
1729 : }
1730 :
1731 : int
1732 0 : nvme_pcie_poll_group_disconnect_qpair(struct spdk_nvme_qpair *qpair)
1733 : {
1734 0 : return 0;
1735 : }
1736 :
1737 : int
1738 0 : nvme_pcie_poll_group_add(struct spdk_nvme_transport_poll_group *tgroup,
1739 : struct spdk_nvme_qpair *qpair)
1740 : {
1741 0 : return 0;
1742 : }
1743 :
1744 : int
1745 0 : nvme_pcie_poll_group_remove(struct spdk_nvme_transport_poll_group *tgroup,
1746 : struct spdk_nvme_qpair *qpair)
1747 : {
1748 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
1749 :
1750 0 : pqpair->stat = &g_dummy_stat;
1751 0 : return 0;
1752 : }
1753 :
1754 : int64_t
1755 0 : nvme_pcie_poll_group_process_completions(struct spdk_nvme_transport_poll_group *tgroup,
1756 : uint32_t completions_per_qpair, spdk_nvme_disconnected_qpair_cb disconnected_qpair_cb)
1757 : {
1758 : struct spdk_nvme_qpair *qpair, *tmp_qpair;
1759 0 : int32_t local_completions = 0;
1760 0 : int64_t total_completions = 0;
1761 :
1762 0 : STAILQ_FOREACH_SAFE(qpair, &tgroup->disconnected_qpairs, poll_group_stailq, tmp_qpair) {
1763 0 : disconnected_qpair_cb(qpair, tgroup->group->ctx);
1764 : }
1765 :
1766 0 : STAILQ_FOREACH_SAFE(qpair, &tgroup->connected_qpairs, poll_group_stailq, tmp_qpair) {
1767 0 : local_completions = spdk_nvme_qpair_process_completions(qpair, completions_per_qpair);
1768 0 : if (spdk_unlikely(local_completions < 0)) {
1769 0 : disconnected_qpair_cb(qpair, tgroup->group->ctx);
1770 0 : total_completions = -ENXIO;
1771 0 : } else if (spdk_likely(total_completions >= 0)) {
1772 0 : total_completions += local_completions;
1773 : }
1774 : }
1775 :
1776 0 : return total_completions;
1777 : }
1778 :
1779 : int
1780 1 : nvme_pcie_poll_group_destroy(struct spdk_nvme_transport_poll_group *tgroup)
1781 : {
1782 1 : if (!STAILQ_EMPTY(&tgroup->connected_qpairs) || !STAILQ_EMPTY(&tgroup->disconnected_qpairs)) {
1783 0 : return -EBUSY;
1784 : }
1785 :
1786 1 : free(tgroup);
1787 :
1788 1 : return 0;
1789 : }
1790 :
1791 : int
1792 3 : nvme_pcie_poll_group_get_stats(struct spdk_nvme_transport_poll_group *tgroup,
1793 : struct spdk_nvme_transport_poll_group_stat **_stats)
1794 : {
1795 : struct nvme_pcie_poll_group *group;
1796 : struct spdk_nvme_transport_poll_group_stat *stats;
1797 :
1798 3 : if (tgroup == NULL || _stats == NULL) {
1799 2 : SPDK_ERRLOG("Invalid stats or group pointer\n");
1800 2 : return -EINVAL;
1801 : }
1802 :
1803 1 : stats = calloc(1, sizeof(*stats));
1804 1 : if (!stats) {
1805 0 : SPDK_ERRLOG("Can't allocate memory for stats\n");
1806 0 : return -ENOMEM;
1807 : }
1808 1 : stats->trtype = SPDK_NVME_TRANSPORT_PCIE;
1809 1 : group = SPDK_CONTAINEROF(tgroup, struct nvme_pcie_poll_group, group);
1810 1 : memcpy(&stats->pcie, &group->stats, sizeof(group->stats));
1811 :
1812 1 : *_stats = stats;
1813 :
1814 1 : return 0;
1815 : }
1816 :
1817 : void
1818 1 : nvme_pcie_poll_group_free_stats(struct spdk_nvme_transport_poll_group *tgroup,
1819 : struct spdk_nvme_transport_poll_group_stat *stats)
1820 : {
1821 1 : free(stats);
1822 1 : }
1823 :
1824 2 : SPDK_TRACE_REGISTER_FN(nvme_pcie, "nvme_pcie", TRACE_GROUP_NVME_PCIE)
1825 : {
1826 0 : struct spdk_trace_tpoint_opts opts[] = {
1827 : {
1828 : "NVME_PCIE_SUBMIT", TRACE_NVME_PCIE_SUBMIT,
1829 : OWNER_TYPE_NVME_PCIE_QP, OBJECT_NVME_PCIE_REQ, 1,
1830 : { { "ctx", SPDK_TRACE_ARG_TYPE_PTR, 8 },
1831 : { "cid", SPDK_TRACE_ARG_TYPE_INT, 4 },
1832 : { "opc", SPDK_TRACE_ARG_TYPE_INT, 4 },
1833 : { "dw10", SPDK_TRACE_ARG_TYPE_PTR, 4 },
1834 : { "dw11", SPDK_TRACE_ARG_TYPE_PTR, 4 },
1835 : { "dw12", SPDK_TRACE_ARG_TYPE_PTR, 4 },
1836 : { "qd", SPDK_TRACE_ARG_TYPE_INT, 4 }
1837 : }
1838 : },
1839 : {
1840 : "NVME_PCIE_COMPLETE", TRACE_NVME_PCIE_COMPLETE,
1841 : OWNER_TYPE_NVME_PCIE_QP, OBJECT_NVME_PCIE_REQ, 0,
1842 : { { "ctx", SPDK_TRACE_ARG_TYPE_PTR, 8 },
1843 : { "cid", SPDK_TRACE_ARG_TYPE_INT, 4 },
1844 : { "cpl", SPDK_TRACE_ARG_TYPE_PTR, 4 },
1845 : { "qd", SPDK_TRACE_ARG_TYPE_INT, 4 }
1846 : }
1847 : },
1848 : };
1849 :
1850 0 : spdk_trace_register_object(OBJECT_NVME_PCIE_REQ, 'p');
1851 0 : spdk_trace_register_owner_type(OWNER_TYPE_NVME_PCIE_QP, 'q');
1852 0 : spdk_trace_register_description_ext(opts, SPDK_COUNTOF(opts));
1853 0 : }
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